From mboxrd@z Thu Jan 1 00:00:00 1970 From: Igor Grinberg Date: Thu, 07 Aug 2014 17:11:10 +0300 Subject: [U-Boot] [PATCH V2 2/9] mx6: add clock enabling functions In-Reply-To: <1407416736-14639-3-git-send-email-nikita@compulab.co.il> References: <1407416736-14639-1-git-send-email-nikita@compulab.co.il> <1407416736-14639-3-git-send-email-nikita@compulab.co.il> Message-ID: <53E388FE.1020104@compulab.co.il> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Nikita, On 08/07/14 16:05, Nikita Kiryanov wrote: > Add functions to enable/disable clocks for UART, SPI, ENET, and MMC. > > Cc: Stefano Babic > Signed-off-by: Nikita Kiryanov > --- > Changes in V2: > - No changes. > > arch/arm/cpu/armv7/mx6/clock.c | 99 +++++++++++++++++++++++++++++++++++ > arch/arm/include/asm/arch-mx6/clock.h | 5 ++ > 2 files changed, 104 insertions(+) > > diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c > index 7dd83ec..696dc98 100644 > --- a/arch/arm/cpu/armv7/mx6/clock.c > +++ b/arch/arm/cpu/armv7/mx6/clock.c > @@ -36,6 +36,35 @@ void enable_ocotp_clk(unsigned char enable) > } > #endif > [...] > +#ifdef CONFIG_FEC_MXC > +void enable_enet_clk(unsigned char enable) > +{ > + u32 reg; > + > + reg = __raw_readl(&imx_ccm->CCGR1); > + if (enable) > + reg |= MXC_CCM_CCGR1_ENET_CLK_ENABLE_MASK; > + else > + reg &= ~(MXC_CCM_CCGR1_ENET_CLK_ENABLE_MASK); > + __raw_writel(reg, &imx_ccm->CCGR1); > +} > +#endif > + > +#ifdef CONFIG_MXC_UART > +void enable_uart_clk(unsigned char enable) > +{ > + u32 reg, mask; > + > + reg = __raw_readl(&imx_ccm->CCGR5); > + mask = MXC_CCM_CCGR5_UART_MASK | MXC_CCM_CCGR5_UART_SERIAL_MASK; > + if (enable) > + reg |= mask; > + else > + reg &= ~mask; > + __raw_writel(reg, &imx_ccm->CCGR5); > +} > +#endif > + > +#ifdef CONFIG_SPI > +/* spi_num can be from 0 - 4 */ > +int enable_cspi_clock(unsigned char enable, unsigned spi_num) > +{ > + u32 reg, mask; > + > + if (spi_num > 4) > + return -EINVAL; > + > + mask = MXC_CCM_CCGR_CG_MASK << (spi_num * 2); > + reg = readl(&imx_ccm->CCGR1); > + if (enable) > + reg |= mask; > + else > + reg &= ~mask; > + > + __raw_writel(reg, &imx_ccm->CCGR1); > + return 0; > +} > +#endif > + > +#ifdef CONFIG_MMC > +int enable_usdhc_clk(unsigned char enable, unsigned bus_num) > +{ > + u32 reg, mask; > + > + if (bus_num > 3) > + return -EINVAL; > + > + mask = MXC_CCM_CCGR_CG_MASK << (bus_num * 2 + 2); > + reg = readl(&imx_ccm->CCGR6); > + if (enable) > + reg |= mask; > + else > + reg &= ~mask; > + > + __raw_writel(reg, &imx_ccm->CCGR6); > + return 0; > +} > +#endif In all the above functions, can we use the clrsetbits_le32() helpers? [...] -- Regards, Igor.