* [U-Boot] [PATCH V2 10/18] arm: mx6: ddr: configure MMDC for slow_pd
2014-08-10 17:12 [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Nikita Kiryanov
@ 2014-08-10 17:12 ` Nikita Kiryanov
2014-08-12 11:29 ` Igor Grinberg
2014-08-10 17:12 ` [U-Boot] [PATCH V2 11/18] arm: mx6: ddr: fix cs0_end calculation Nikita Kiryanov
` (8 subsequent siblings)
9 siblings, 1 reply; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-10 17:12 UTC (permalink / raw)
To: u-boot
According to MX6 TRM, both MMDC and DRAM should be configured to
the same powerdown precharge. Currently, mx6_dram_cfg()
configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for
'slow exit (DLL off)' (MR0[12] = 0).
Configure MMDC for slow pd.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V2:
- Updated commit message to explain what bits in what registers
correspond to what settings.
arch/arm/cpu/armv7/mx6/ddr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
index 70ce38f..c0fb749 100644
--- a/arch/arm/cpu/armv7/mx6/ddr.c
+++ b/arch/arm/cpu/armv7/mx6/ddr.c
@@ -463,6 +463,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
mmdc0->mdpdc = (tcke & 0x7) << 16 |
5 << 12 | /* PWDT_1: 256 cycles */
5 << 8 | /* PWDT_0: 256 cycles */
+ 1 << 7 | /* SLOW_PD */
1 << 6 | /* BOTH_CS_PD */
(tcksrx & 0x7) << 3 |
(tcksre & 0x7);
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 10/18] arm: mx6: ddr: configure MMDC for slow_pd
2014-08-10 17:12 ` [U-Boot] [PATCH V2 10/18] arm: mx6: ddr: configure MMDC for slow_pd Nikita Kiryanov
@ 2014-08-12 11:29 ` Igor Grinberg
0 siblings, 0 replies; 34+ messages in thread
From: Igor Grinberg @ 2014-08-12 11:29 UTC (permalink / raw)
To: u-boot
On 08/10/14 20:12, Nikita Kiryanov wrote:
> According to MX6 TRM, both MMDC and DRAM should be configured to
> the same powerdown precharge. Currently, mx6_dram_cfg()
> configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for
> 'slow exit (DLL off)' (MR0[12] = 0).
>
> Configure MMDC for slow pd.
>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Tim Harvey <tharvey@gateworks.com>
> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
> ---
> Changes in V2:
> - Updated commit message to explain what bits in what registers
> correspond to what settings.
>
> arch/arm/cpu/armv7/mx6/ddr.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
> index 70ce38f..c0fb749 100644
> --- a/arch/arm/cpu/armv7/mx6/ddr.c
> +++ b/arch/arm/cpu/armv7/mx6/ddr.c
> @@ -463,6 +463,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
> mmdc0->mdpdc = (tcke & 0x7) << 16 |
> 5 << 12 | /* PWDT_1: 256 cycles */
> 5 << 8 | /* PWDT_0: 256 cycles */
> + 1 << 7 | /* SLOW_PD */
> 1 << 6 | /* BOTH_CS_PD */
> (tcksrx & 0x7) << 3 |
> (tcksre & 0x7);
>
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V2 11/18] arm: mx6: ddr: fix cs0_end calculation
2014-08-10 17:12 [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Nikita Kiryanov
2014-08-10 17:12 ` [U-Boot] [PATCH V2 10/18] arm: mx6: ddr: configure MMDC for slow_pd Nikita Kiryanov
@ 2014-08-10 17:12 ` Nikita Kiryanov
2014-08-10 17:12 ` [U-Boot] [PATCH V2 12/18] arm: mx6: add support for Compulab cm-fx6 CoM Nikita Kiryanov
` (7 subsequent siblings)
9 siblings, 0 replies; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-10 17:12 UTC (permalink / raw)
To: u-boot
Current way of calculation CS0_END field for MMDCx_MDASP register
is problematic because in most cases the user is forced to define
cs_density in an unnatural way: as value - 2, instead of value.
This breaks the abstraction provided by struct mx6_ddr_sysinfo
because the user is forced to be aware of the way the calculation
is performed.
Refactor the calculation.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V2:
- No changes
arch/arm/cpu/armv7/mx6/ddr.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c
index c0fb749..d3891dc 100644
--- a/arch/arm/cpu/armv7/mx6/ddr.c
+++ b/arch/arm/cpu/armv7/mx6/ddr.c
@@ -308,9 +308,7 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo,
twtr = ROUND(MAX(4 * clkper, 7500) / clkper, 1) - 1;
trcd = trp;
trtp = twtr;
- cs0_end = (4 * sysinfo->cs_density <= 120) ?
- 4 * sysinfo->cs_density + 7 :
- 127;
+ cs0_end = 4 * sysinfo->cs_density - 1;
debug("density:%d Gb (%d Gb per chip)\n",
sysinfo->cs_density, ddr3_cfg->density);
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 12/18] arm: mx6: add support for Compulab cm-fx6 CoM
2014-08-10 17:12 [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Nikita Kiryanov
2014-08-10 17:12 ` [U-Boot] [PATCH V2 10/18] arm: mx6: ddr: configure MMDC for slow_pd Nikita Kiryanov
2014-08-10 17:12 ` [U-Boot] [PATCH V2 11/18] arm: mx6: ddr: fix cs0_end calculation Nikita Kiryanov
@ 2014-08-10 17:12 ` Nikita Kiryanov
2014-08-10 20:53 ` Marek Vasut
2014-08-11 16:22 ` [U-Boot] [PATCH V3 " Nikita Kiryanov
2014-08-10 17:12 ` [U-Boot] [PATCH V2 13/18] arm: mx6: cm_fx6: add nand support Nikita Kiryanov
` (6 subsequent siblings)
9 siblings, 2 replies; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-10 17:12 UTC (permalink / raw)
To: u-boot
Add initial support for Compulab CM-FX6 CoM.
Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V2:
- Remove unnecessary line removal from arch/arm/cpu/armv7/mx6/ddr.c
- Move probe_mmdc_config() code straight to dram_init()
- Use imx6_spl.h
- Use imx_ddr_size()
NOTE: the correction of this patch now depends on https://patchwork.ozlabs.org/patch/376095/
board/compulab/cm_fx6/Makefile | 12 ++
board/compulab/cm_fx6/cm_fx6.c | 98 +++++++++
board/compulab/cm_fx6/common.c | 83 ++++++++
board/compulab/cm_fx6/common.h | 36 ++++
board/compulab/cm_fx6/imximage.cfg | 8 +
board/compulab/cm_fx6/spl.c | 400 +++++++++++++++++++++++++++++++++++++
boards.cfg | 2 +
include/configs/cm_fx6.h | 212 ++++++++++++++++++++
8 files changed, 851 insertions(+)
create mode 100644 board/compulab/cm_fx6/Makefile
create mode 100644 board/compulab/cm_fx6/cm_fx6.c
create mode 100644 board/compulab/cm_fx6/common.c
create mode 100644 board/compulab/cm_fx6/common.h
create mode 100644 board/compulab/cm_fx6/imximage.cfg
create mode 100644 board/compulab/cm_fx6/spl.c
create mode 100644 include/configs/cm_fx6.h
diff --git a/board/compulab/cm_fx6/Makefile b/board/compulab/cm_fx6/Makefile
new file mode 100644
index 0000000..3e5c903
--- /dev/null
+++ b/board/compulab/cm_fx6/Makefile
@@ -0,0 +1,12 @@
+#
+# (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il>
+#
+# Authors: Nikita Kiryanov <nikita@compulab.co.il>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+ifdef CONFIG_SPL_BUILD
+obj-y = common.o spl.o
+else
+obj-y = common.o cm_fx6.o
+endif
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
new file mode 100644
index 0000000..47d17bb
--- /dev/null
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -0,0 +1,98 @@
+/*
+ * Board functions for Compulab CM-FX6 board
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Nikita Kiryanov <nikita@compulab.co.il>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+#include "common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_FSL_ESDHC
+int board_mmc_init(bd_t *bis)
+{
+ int i;
+
+ cm_fx6_set_usdhc_iomux();
+ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
+ usdhc_cfg[i].sdhc_clk = mxc_get_clock(usdhc_clk[i]);
+ usdhc_cfg[i].max_bus_width = 4;
+ fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
+ enable_usdhc_clk(1, i);
+ }
+
+ return 0;
+}
+#endif
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts("Board: CM-FX6\n");
+ return 0;
+}
+
+static ulong bank1_size;
+static ulong bank2_size;
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = bank1_size;
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = bank2_size;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = imx_ddr_size();
+ switch (gd->ram_size) {
+ case 0x10000000: /* DDR_16BIT_256MB */
+ bank1_size = 0x10000000;
+ bank2_size = 0;
+ break;
+ case 0x20000000: /* DDR_32BIT_512MB */
+ bank1_size = 0x20000000;
+ bank2_size = 0;
+ break;
+ case 0x40000000:
+ if (is_cpu_type(MXC_CPU_MX6SOLO)) { /* DDR_32BIT_1GB */
+ bank1_size = 0x20000000;
+ bank2_size = 0x20000000;
+ } else { /* DDR_64BIT_1GB */
+ bank1_size = 0x40000000;
+ bank2_size = 0;
+ }
+ break;
+ case 0x80000000: /* DDR_64BIT_2GB */
+ bank1_size = 0x40000000;
+ bank2_size = 0x40000000;
+ break;
+ case 0xF0000000: /* DDR_64BIT_4GB */
+ bank1_size = 0x70000000;
+ bank2_size = 0x7FF00000;
+ gd->ram_size -= 0x100000;
+ break;
+ default:
+ printf("ERROR: Unsupported DRAM size 0x%lx\n", gd->ram_size);
+ return -1;
+ }
+
+ return 0;
+}
+
+u32 get_board_rev(void)
+{
+ return 100;
+}
diff --git a/board/compulab/cm_fx6/common.c b/board/compulab/cm_fx6/common.c
new file mode 100644
index 0000000..a2d9ca4
--- /dev/null
+++ b/board/compulab/cm_fx6/common.c
@@ -0,0 +1,83 @@
+/*
+ * Code used by both U-Boot and SPL for Compulab CM-FX6
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Nikita Kiryanov <nikita@compulab.co.il>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include "common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_FSL_ESDHC
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const usdhc_pads[] = {
+ IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+
+ IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+
+ IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
+
+void cm_fx6_set_usdhc_iomux(void)
+{
+ SETUP_IOMUX_PADS(usdhc_pads);
+}
+
+/* CINS bit doesn't work, so always try to access the MMC card */
+int board_mmc_getcd(struct mmc *mmc)
+{
+ return 1;
+}
+#endif
+
+#ifdef CONFIG_MXC_SPI
+#define ECSPI_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \
+ PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const ecspi_pads[] = {
+ IOMUX_PADS(PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_D19__ECSPI1_SS1 | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
+};
+
+void cm_fx6_set_ecspi_iomux(void)
+{
+ SETUP_IOMUX_PADS(ecspi_pads);
+}
+
+int board_spi_cs_gpio(unsigned bus, unsigned cs)
+{
+ return (bus == 0 && cs == 0) ? (CM_FX6_ECSPI_BUS0_CS0) : -1;
+}
+#endif
diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h
new file mode 100644
index 0000000..05eab34
--- /dev/null
+++ b/board/compulab/cm_fx6/common.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Nikita Kiryanov <nikita@compulab.co.il>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/clock.h>
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define CM_FX6_ECSPI_BUS0_CS0 IMX_GPIO_NR(2, 30)
+#define CM_FX6_GREEN_LED IMX_GPIO_NR(2, 31)
+
+#if defined(CONFIG_FSL_ESDHC)
+#include <fsl_esdhc.h>
+
+static __maybe_unused struct fsl_esdhc_cfg usdhc_cfg[3] = {
+ {USDHC1_BASE_ADDR},
+ {USDHC2_BASE_ADDR},
+ {USDHC3_BASE_ADDR},
+};
+
+static __maybe_unused enum mxc_clock usdhc_clk[3] = {
+ MXC_ESDHC_CLK,
+ MXC_ESDHC2_CLK,
+ MXC_ESDHC3_CLK,
+};
+#endif
+
+void cm_fx6_set_usdhc_iomux(void);
+void cm_fx6_set_ecspi_iomux(void);
diff --git a/board/compulab/cm_fx6/imximage.cfg b/board/compulab/cm_fx6/imximage.cfg
new file mode 100644
index 0000000..8e7ec91
--- /dev/null
+++ b/board/compulab/cm_fx6/imximage.cfg
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+IMAGE_VERSION 2
+BOOT_FROM sd
diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c
new file mode 100644
index 0000000..9f9e5f8
--- /dev/null
+++ b/board/compulab/cm_fx6/spl.c
@@ -0,0 +1,400 @@
+/*
+ * SPL specific code for Compulab CM-FX6 board
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Nikita Kiryanov <nikita@compulab.co.il>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/mx6-ddr.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/imx-common/iomux-v3.h>
+#include <fsl_esdhc.h>
+#include "common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum ddr_config {
+ DDR_16BIT_256MB,
+ DDR_32BIT_512MB,
+ DDR_32BIT_1GB,
+ DDR_64BIT_1GB,
+ DDR_64BIT_2GB,
+ DDR_64BIT_4GB,
+ DDR_UNKNOWN,
+};
+
+static void spl_mx6s_dram_setup_iomux(void)
+{
+ struct mx6sdl_iomux_ddr_regs ddr_iomux;
+ struct mx6sdl_iomux_grp_regs grp_iomux;
+
+ ddr_iomux.dram_sdqs0 = 0x00000038;
+ ddr_iomux.dram_sdqs1 = 0x00000038;
+ ddr_iomux.dram_sdqs2 = 0x00000038;
+ ddr_iomux.dram_sdqs3 = 0x00000038;
+ ddr_iomux.dram_sdqs4 = 0x00000038;
+ ddr_iomux.dram_sdqs5 = 0x00000038;
+ ddr_iomux.dram_sdqs6 = 0x00000038;
+ ddr_iomux.dram_sdqs7 = 0x00000038;
+ ddr_iomux.dram_dqm0 = 0x00000038;
+ ddr_iomux.dram_dqm1 = 0x00000038;
+ ddr_iomux.dram_dqm2 = 0x00000038;
+ ddr_iomux.dram_dqm3 = 0x00000038;
+ ddr_iomux.dram_dqm4 = 0x00000038;
+ ddr_iomux.dram_dqm5 = 0x00000038;
+ ddr_iomux.dram_dqm6 = 0x00000038;
+ ddr_iomux.dram_dqm7 = 0x00000038;
+ ddr_iomux.dram_cas = 0x00000038;
+ ddr_iomux.dram_ras = 0x00000038;
+ ddr_iomux.dram_sdclk_0 = 0x00000038;
+ ddr_iomux.dram_sdclk_1 = 0x00000038;
+ ddr_iomux.dram_sdcke0 = 0x00003000;
+ ddr_iomux.dram_sdcke1 = 0x00003000;
+ /*
+ * Below DRAM_RESET[DDR_SEL] = 0 which is incorrect according to
+ * Freescale QRM, but this is exactly the value used by the automatic
+ * calibration script and it works also in all our tests, so we leave
+ * it as is at this point.
+ */
+ ddr_iomux.dram_reset = 0x00000038;
+ ddr_iomux.dram_sdba2 = 0x00000000;
+ ddr_iomux.dram_sdodt0 = 0x00000038;
+ ddr_iomux.dram_sdodt1 = 0x00000038;
+ grp_iomux.grp_b0ds = 0x00000038;
+ grp_iomux.grp_b1ds = 0x00000038;
+ grp_iomux.grp_b2ds = 0x00000038;
+ grp_iomux.grp_b3ds = 0x00000038;
+ grp_iomux.grp_b4ds = 0x00000038;
+ grp_iomux.grp_b5ds = 0x00000038;
+ grp_iomux.grp_b6ds = 0x00000038;
+ grp_iomux.grp_b7ds = 0x00000038;
+ grp_iomux.grp_addds = 0x00000038;
+ grp_iomux.grp_ddrmode_ctl = 0x00020000;
+ grp_iomux.grp_ddrpke = 0x00000000;
+ grp_iomux.grp_ddrmode = 0x00020000;
+ grp_iomux.grp_ctlds = 0x00000038;
+ grp_iomux.grp_ddr_type = 0x000C0000;
+ mx6sdl_dram_iocfg(64, &ddr_iomux, &grp_iomux);
+}
+
+static void spl_mx6q_dram_setup_iomux(void)
+{
+ struct mx6dq_iomux_ddr_regs ddr_iomux;
+ struct mx6dq_iomux_grp_regs grp_iomux;
+
+ ddr_iomux.dram_sdqs0 = 0x00000038;
+ ddr_iomux.dram_sdqs1 = 0x00000038;
+ ddr_iomux.dram_sdqs2 = 0x00000038;
+ ddr_iomux.dram_sdqs3 = 0x00000038;
+ ddr_iomux.dram_sdqs4 = 0x00000038;
+ ddr_iomux.dram_sdqs5 = 0x00000038;
+ ddr_iomux.dram_sdqs6 = 0x00000038;
+ ddr_iomux.dram_sdqs7 = 0x00000038;
+ ddr_iomux.dram_dqm0 = 0x00000038;
+ ddr_iomux.dram_dqm1 = 0x00000038;
+ ddr_iomux.dram_dqm2 = 0x00000038;
+ ddr_iomux.dram_dqm3 = 0x00000038;
+ ddr_iomux.dram_dqm4 = 0x00000038;
+ ddr_iomux.dram_dqm5 = 0x00000038;
+ ddr_iomux.dram_dqm6 = 0x00000038;
+ ddr_iomux.dram_dqm7 = 0x00000038;
+ ddr_iomux.dram_cas = 0x00000038;
+ ddr_iomux.dram_ras = 0x00000038;
+ ddr_iomux.dram_sdclk_0 = 0x00000038;
+ ddr_iomux.dram_sdclk_1 = 0x00000038;
+ ddr_iomux.dram_sdcke0 = 0x00003000;
+ ddr_iomux.dram_sdcke1 = 0x00003000;
+ /*
+ * Below DRAM_RESET[DDR_SEL] = 0 which is incorrect according to
+ * Freescale QRM, but this is exactly the value used by the automatic
+ * calibration script and it works also in all our tests, so we leave
+ * it as is at this point.
+ */
+ ddr_iomux.dram_reset = 0x00000038;
+ ddr_iomux.dram_sdba2 = 0x00000000;
+ ddr_iomux.dram_sdodt0 = 0x00000038;
+ ddr_iomux.dram_sdodt1 = 0x00000038;
+ grp_iomux.grp_b0ds = 0x00000038;
+ grp_iomux.grp_b1ds = 0x00000038;
+ grp_iomux.grp_b2ds = 0x00000038;
+ grp_iomux.grp_b3ds = 0x00000038;
+ grp_iomux.grp_b4ds = 0x00000038;
+ grp_iomux.grp_b5ds = 0x00000038;
+ grp_iomux.grp_b6ds = 0x00000038;
+ grp_iomux.grp_b7ds = 0x00000038;
+ grp_iomux.grp_addds = 0x00000038;
+ grp_iomux.grp_ddrmode_ctl = 0x00020000;
+ grp_iomux.grp_ddrpke = 0x00000000;
+ grp_iomux.grp_ddrmode = 0x00020000;
+ grp_iomux.grp_ctlds = 0x00000038;
+ grp_iomux.grp_ddr_type = 0x000C0000;
+ mx6dq_dram_iocfg(64, &ddr_iomux, &grp_iomux);
+}
+
+static void spl_mx6s_dram_init(enum ddr_config dram_config, int reset)
+{
+ struct mx6_mmdc_calibration calib;
+ struct mx6_ddr_sysinfo sysinfo;
+ struct mx6_ddr3_cfg ddr3_cfg;
+
+ if (reset)
+ ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2;
+
+ calib.p0_mpwldectrl0 = 0x005B0061;
+ calib.p0_mpwldectrl1 = 0x004F0055;
+ calib.p0_mpdgctrl0 = 0x0314030C;
+ calib.p0_mpdgctrl1 = 0x025C0268;
+ calib.p0_mprddlctl = 0x42464646;
+ calib.p0_mpwrdlctl = 0x36322C34;
+ ddr3_cfg.mem_speed = 800;
+ ddr3_cfg.density = 4;
+ ddr3_cfg.rowaddr = 14;
+ ddr3_cfg.coladdr = 10;
+ ddr3_cfg.pagesz = 2;
+ ddr3_cfg.trcd = 1800;
+ ddr3_cfg.trcmin = 5200;
+ ddr3_cfg.trasmin = 3600;
+ ddr3_cfg.SRT = 0;
+ sysinfo.cs1_mirror = 1;
+ sysinfo.cs_density = 16;
+ sysinfo.bi_on = 1;
+ sysinfo.rtt_nom = 1;
+ sysinfo.rtt_wr = 0;
+ sysinfo.ralat = 5;
+ sysinfo.walat = 1;
+ sysinfo.mif3_mode = 3;
+ sysinfo.rst_to_cke = 0x23;
+ sysinfo.sde_to_rst = 0x10;
+ switch (dram_config) {
+ case DDR_16BIT_256MB:
+ sysinfo.dsize = 0;
+ sysinfo.ncs = 1;
+ break;
+ case DDR_32BIT_512MB:
+ sysinfo.dsize = 1;
+ sysinfo.ncs = 1;
+ break;
+ case DDR_32BIT_1GB:
+ sysinfo.dsize = 1;
+ sysinfo.ncs = 2;
+ break;
+ default:
+ puts("Tried to setup invalid DDR configuration\n");
+ hang();
+ }
+
+ mx6_dram_cfg(&sysinfo, &calib, &ddr3_cfg);
+ udelay(100);
+}
+
+static void spl_mx6q_dram_init(enum ddr_config dram_config, int reset)
+{
+ struct mx6_mmdc_calibration calib;
+ struct mx6_ddr_sysinfo sysinfo;
+ struct mx6_ddr3_cfg ddr3_cfg;
+
+ if (reset)
+ ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2;
+
+ calib.p0_mpwldectrl0 = 0x00630068;
+ calib.p0_mpwldectrl1 = 0x0068005D;
+ calib.p0_mpdgctrl0 = 0x04140428;
+ calib.p0_mpdgctrl1 = 0x037C037C;
+ calib.p0_mprddlctl = 0x3C30303A;
+ calib.p0_mpwrdlctl = 0x3A344038;
+ calib.p1_mpwldectrl0 = 0x0035004C;
+ calib.p1_mpwldectrl1 = 0x00170026;
+ calib.p1_mpdgctrl0 = 0x0374037C;
+ calib.p1_mpdgctrl1 = 0x0350032C;
+ calib.p1_mprddlctl = 0x30322A3C;
+ calib.p1_mpwrdlctl = 0x48304A3E;
+ ddr3_cfg.mem_speed = 1066;
+ ddr3_cfg.density = 4;
+ ddr3_cfg.rowaddr = 14;
+ ddr3_cfg.coladdr = 10;
+ ddr3_cfg.pagesz = 2;
+ ddr3_cfg.trcd = 1324;
+ ddr3_cfg.trcmin = 59500;
+ ddr3_cfg.trasmin = 9750;
+ ddr3_cfg.SRT = 0;
+ sysinfo.cs_density = 16;
+ sysinfo.cs1_mirror = 1;
+ sysinfo.bi_on = 1;
+ sysinfo.rtt_nom = 1;
+ sysinfo.rtt_wr = 0;
+ sysinfo.ralat = 5;
+ sysinfo.walat = 1;
+ sysinfo.mif3_mode = 3;
+ sysinfo.rst_to_cke = 0x23;
+ sysinfo.sde_to_rst = 0x10;
+ switch (dram_config) {
+ case DDR_16BIT_256MB:
+ sysinfo.dsize = 0;
+ sysinfo.ncs = 1;
+ break;
+ case DDR_32BIT_512MB:
+ sysinfo.dsize = 1;
+ sysinfo.ncs = 1;
+ break;
+ case DDR_64BIT_1GB:
+ sysinfo.dsize = 2;
+ sysinfo.ncs = 1;
+ break;
+ case DDR_64BIT_2GB:
+ sysinfo.dsize = 2;
+ sysinfo.ncs = 2;
+ break;
+ case DDR_64BIT_4GB:
+ sysinfo.dsize = 2;
+ sysinfo.ncs = 2;
+ ddr3_cfg.rowaddr = 15;
+ break;
+ default:
+ puts("Tried to setup invalid DDR configuration\n");
+ hang();
+ }
+
+ mx6_dram_cfg(&sysinfo, &calib, &ddr3_cfg);
+ udelay(100);
+}
+
+static int cm_fx6_spl_dram_init(void)
+{
+ u32 cpurev, imxtype;
+ unsigned long bank1_size, bank2_size;
+
+ cpurev = get_cpu_rev();
+ imxtype = (cpurev & 0xFF000) >> 12;
+
+ switch (imxtype) {
+ case MXC_CPU_MX6SOLO:
+ spl_mx6s_dram_setup_iomux();
+
+ spl_mx6s_dram_init(DDR_32BIT_1GB, 0);
+ bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
+ if (bank1_size == 0x40000000)
+ return 0;
+
+ if (bank1_size == 0x20000000) {
+ spl_mx6s_dram_init(DDR_32BIT_512MB, 1);
+ return 0;
+ }
+
+ spl_mx6s_dram_init(DDR_16BIT_256MB, 1);
+ bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
+ if (bank1_size == 0x10000000)
+ return 0;
+
+ break;
+ case MXC_CPU_MX6D:
+ case MXC_CPU_MX6Q:
+ spl_mx6q_dram_setup_iomux();
+
+ spl_mx6q_dram_init(DDR_64BIT_4GB, 0);
+ bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
+ if (bank1_size == 0x80000000)
+ return 0;
+
+ if (bank1_size == 0x40000000) {
+ bank2_size = get_ram_size((long int *)PHYS_SDRAM_2,
+ 0x80000000);
+ if (bank2_size == 0x40000000) {
+ /* Don't do a full reset here */
+ spl_mx6q_dram_init(DDR_64BIT_2GB, 0);
+ } else {
+ spl_mx6q_dram_init(DDR_64BIT_1GB, 1);
+ }
+
+ return 0;
+ }
+
+ spl_mx6q_dram_init(DDR_32BIT_512MB, 1);
+ bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
+ if (bank1_size == 0x20000000)
+ return 0;
+
+ spl_mx6q_dram_init(DDR_16BIT_256MB, 1);
+ bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
+ if (bank1_size == 0x10000000)
+ return 0;
+
+ break;
+ }
+
+ return -1;
+}
+
+static iomux_v3_cfg_t const uart4_pads[] = {
+ IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+ IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+
+static void cm_fx6_setup_uart(void)
+{
+ SETUP_IOMUX_PADS(uart4_pads);
+ enable_uart_clk(1);
+}
+
+#ifdef CONFIG_SPL_SPI_SUPPORT
+static void cm_fx6_setup_ecspi(void)
+{
+ enable_cspi_clock(1, 0);
+ cm_fx6_set_ecspi_iomux();
+}
+#else
+static void cm_fx6_setup_ecspi(void) { }
+#endif
+
+void board_init_f(ulong dummy)
+{
+ gd = &gdata;
+ enable_usdhc_clk(1, 2);
+ arch_cpu_init();
+ timer_init();
+ cm_fx6_setup_ecspi();
+ cm_fx6_setup_uart();
+ get_clocks();
+ preloader_console_init();
+ gpio_direction_output(CM_FX6_GREEN_LED, 1);
+ if (cm_fx6_spl_dram_init()) {
+ puts("!!!ERROR!!! DRAM detection failed!!!\n");
+ hang();
+ }
+
+ memset(__bss_start, 0, __bss_end - __bss_start);
+ board_init_r(NULL, 0);
+}
+
+void spl_board_init(void)
+{
+ uint soc_sbmr = readl(SRC_BASE_ADDR + 0x4);
+ uint bt_mem_ctl = (soc_sbmr & 0x000000FF) >> 4;
+ uint bt_mem_type = (soc_sbmr & 0x00000008) >> 3;
+
+ if (bt_mem_ctl == 0x3 && !bt_mem_type)
+ puts("Booting from SPI flash\n");
+ else if (bt_mem_ctl == 0x4 || bt_mem_ctl == 0x5)
+ puts("Booting from MMC\n");
+ else
+ puts("Unknown boot device\n");
+}
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+int board_mmc_init(bd_t *bis)
+{
+ cm_fx6_set_usdhc_iomux();
+
+ usdhc_cfg[2].sdhc_clk = mxc_get_clock(usdhc_clk[2]);
+ usdhc_cfg[2].max_bus_width = 4;
+
+ return fsl_esdhc_initialize(bis, &usdhc_cfg[2]);
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index e3a0726..308b94e 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -334,6 +334,8 @@ Active arm armv7 mx6 freescale mx6sabresd
Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 gateworks gw_ventana gwventana gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6QDL,SPL Tim Harvey <tharvey@gateworks.com>
Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton <jon.nettleton@gmail.com>
+Active arm armv7 mx6 compulab cm_fx6 cm_fx6
+- Nikita Kiryanov <nikita@compulab.co.il>
Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman <sakoman@gmail.com>
Active arm armv7 omap3 - pandora omap3_pandora - Grazvydas Ignotas <notasas@gmail.com>
Active arm armv7 omap3 8dtech eco5pk eco5pk - Raphael Assenat <raph@8d.com>
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
new file mode 100644
index 0000000..fa88898
--- /dev/null
+++ b/include/configs/cm_fx6.h
@@ -0,0 +1,212 @@
+/*
+ * Config file for Compulab CM-FX6 board
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Nikita Kiryanov <nikita@compulab.co.il>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_CM_FX6_H
+#define __CONFIG_CM_FX6_H
+
+#include <asm/arch/imx-regs.h>
+#include <config_distro_defaults.h>
+
+#define CONFIG_SYS_L2CACHE_OFF
+#include "mx6_common.h"
+
+/* Machine config */
+#define CONFIG_MX6
+#define CONFIG_MX6QDL
+#define CONFIG_CM_FX6
+#define CONFIG_SYS_LITTLE_ENDIAN
+#define CONFIG_MACH_TYPE 4273
+#define CONFIG_SYS_HZ 1000
+
+/* Display information on boot */
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_TIMESTAMP
+
+/* CMD */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_GREPENV
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_XIMG
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+
+/* MMC */
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_USDHC_NUM 3
+#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
+
+/* RAM */
+#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
+#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_NR_DRAM_BANKS 2
+#define CONFIG_SYS_MEMTEST_START 0x10000000
+#define CONFIG_SYS_MEMTEST_END 0x10010000
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* Serial console */
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART4_BASE
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
+
+/* Shell */
+#define CONFIG_SYS_PROMPT "CM-FX6 # "
+#define CONFIG_SYS_CBSIZE 1024
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/* SPI flash */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_CMD_SF
+#define CONFIG_SF_DEFAULT_BUS 0
+#define CONFIG_SF_DEFAULT_CS 0
+#define CONFIG_SF_DEFAULT_SPEED 25000000
+#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
+
+/* Environment */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
+#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
+#define CONFIG_ENV_SECT_SIZE (64 * 1024)
+#define CONFIG_ENV_SIZE (8 * 1024)
+#define CONFIG_ENV_OFFSET (768 * 1024)
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "kernel=uImage-cm-fx6\0" \
+ "autoload=no\0" \
+ "loadaddr=0x10800000\0" \
+ "fdtaddr=0x11000000\0" \
+ "console=ttymxc3,115200\0" \
+ "ethprime=FEC0\0" \
+ "bootscr=boot.scr\0" \
+ "bootm_low=18000000\0" \
+ "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32 at 50,if=RGB32\0" \
+ "video_dvi=mxcfb0:dev=dvi,1280x800M-32 at 50,if=RGB32\0" \
+ "fdtfile=cm-fx6.dtb\0" \
+ "doboot=bootm ${loadaddr}\0" \
+ "loadfdt=false\0" \
+ "setboottypez=setenv kernel zImage-cm-fx6;" \
+ "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
+ "setenv loadfdt true;\0" \
+ "setboottypem=setenv kernel uImage-cm-fx6;" \
+ "setenv doboot bootm ${loadaddr};" \
+ "setenv loadfdt false;\0"\
+ "run_eboot=echo Starting EBOOT ...; "\
+ "mmc dev ${mmcdev} && " \
+ "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
+ "mmcdev=2\0" \
+ "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
+ "loadmmcbootscript=fatload mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
+ "mmcbootscript=echo Running bootscript from mmc ...; "\
+ "source ${loadaddr}\0" \
+ "mmcargs=setenv bootargs console=${console} " \
+ "root=${mmcroot} " \
+ "${video}\0" \
+ "mmcloadkernel=fatload mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
+ "mmcloadfdt=fatload mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "run doboot\0" \
+ "nandroot=/dev/mtdblock4 rw\0" \
+ "nandrootfstype=ubifs\0" \
+ "nandargs=setenv bootargs console=${console} " \
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype} " \
+ "${video}\0" \
+ "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "nand read ${loadaddr} 0 780000; " \
+ "if ${loadfdt}; then " \
+ "run nandloadfdt;" \
+ "fi; " \
+ "run doboot\0" \
+ "boot=mmc dev ${mmcdev}; " \
+ "if mmc rescan; then " \
+ "if run loadmmcbootscript; then " \
+ "run mmcbootscript;" \
+ "else " \
+ "if run mmcloadkernel; then " \
+ "if ${loadfdt}; then " \
+ "run mmcloadfdt;" \
+ "fi;" \
+ "run mmcboot;" \
+ "fi;" \
+ "fi;" \
+ "fi;"
+
+#define CONFIG_BOOTCOMMAND \
+ "run setboottypem; run boot"
+
+/* SPI */
+#define CONFIG_SPI
+#define CONFIG_MXC_SPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_ATMEL
+#define CONFIG_SPI_FLASH_EON
+#define CONFIG_SPI_FLASH_GIGADEVICE
+#define CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SPI_FLASH_WINBOND
+
+/* GPIO */
+#define CONFIG_MXC_GPIO
+
+/* Boot */
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_LOADADDR 0x10800000
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_SYS_TEXT_BASE 0x10800000
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/* misc */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_STACKSIZE (128 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
+
+/* SPL */
+#define CONFIG_SPL
+#include "imx6_spl.h"
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
+#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
+#define CONFIG_SPL_SPI_LOAD
+
+#endif /* __CONFIG_CM_FX6_H */
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 12/18] arm: mx6: add support for Compulab cm-fx6 CoM
2014-08-10 17:12 ` [U-Boot] [PATCH V2 12/18] arm: mx6: add support for Compulab cm-fx6 CoM Nikita Kiryanov
@ 2014-08-10 20:53 ` Marek Vasut
2014-08-11 16:22 ` [U-Boot] [PATCH V3 " Nikita Kiryanov
1 sibling, 0 replies; 34+ messages in thread
From: Marek Vasut @ 2014-08-10 20:53 UTC (permalink / raw)
To: u-boot
On Sunday, August 10, 2014 at 07:12:54 PM, Nikita Kiryanov wrote:
> Add initial support for Compulab CM-FX6 CoM.
> Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.
>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Tom Rini <trini@ti.com>
> Cc: Marek Vasut <marex@denx.de>
> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Marek Vasut <marex@denx.de>
Thanks!
Best regards,
Marek Vasut
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V3 12/18] arm: mx6: add support for Compulab cm-fx6 CoM
2014-08-10 17:12 ` [U-Boot] [PATCH V2 12/18] arm: mx6: add support for Compulab cm-fx6 CoM Nikita Kiryanov
2014-08-10 20:53 ` Marek Vasut
@ 2014-08-11 16:22 ` Nikita Kiryanov
2014-08-12 14:48 ` Simon Glass
2014-08-13 12:55 ` Igor Grinberg
1 sibling, 2 replies; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-11 16:22 UTC (permalink / raw)
To: u-boot
Add initial support for Compulab CM-FX6 CoM.
Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V3:
- Remove CONFIG_SYS_TEXT_BASE from config file to not clash with the
one supplied by imx6_spl.h
Changes in V2:
- Remove unnecessary line removal from arch/arm/cpu/armv7/mx6/ddr.c
- Move probe_mmdc_config() code straight to dram_init()
- Use imx6_spl.h
- Use imx_ddr_size()
NOTE: the correctness of this patch now depends on https://patchwork.ozlabs.org/patch/376095/
board/compulab/cm_fx6/Makefile | 12 ++
board/compulab/cm_fx6/cm_fx6.c | 98 +++++++++
board/compulab/cm_fx6/common.c | 83 ++++++++
board/compulab/cm_fx6/common.h | 36 ++++
board/compulab/cm_fx6/imximage.cfg | 8 +
board/compulab/cm_fx6/spl.c | 400 +++++++++++++++++++++++++++++++++++++
boards.cfg | 2 +
include/configs/cm_fx6.h | 211 +++++++++++++++++++
8 files changed, 850 insertions(+)
create mode 100644 board/compulab/cm_fx6/Makefile
create mode 100644 board/compulab/cm_fx6/cm_fx6.c
create mode 100644 board/compulab/cm_fx6/common.c
create mode 100644 board/compulab/cm_fx6/common.h
create mode 100644 board/compulab/cm_fx6/imximage.cfg
create mode 100644 board/compulab/cm_fx6/spl.c
create mode 100644 include/configs/cm_fx6.h
diff --git a/board/compulab/cm_fx6/Makefile b/board/compulab/cm_fx6/Makefile
new file mode 100644
index 0000000..3e5c903
--- /dev/null
+++ b/board/compulab/cm_fx6/Makefile
@@ -0,0 +1,12 @@
+#
+# (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il>
+#
+# Authors: Nikita Kiryanov <nikita@compulab.co.il>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+ifdef CONFIG_SPL_BUILD
+obj-y = common.o spl.o
+else
+obj-y = common.o cm_fx6.o
+endif
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
new file mode 100644
index 0000000..47d17bb
--- /dev/null
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -0,0 +1,98 @@
+/*
+ * Board functions for Compulab CM-FX6 board
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Nikita Kiryanov <nikita@compulab.co.il>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+#include "common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_FSL_ESDHC
+int board_mmc_init(bd_t *bis)
+{
+ int i;
+
+ cm_fx6_set_usdhc_iomux();
+ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
+ usdhc_cfg[i].sdhc_clk = mxc_get_clock(usdhc_clk[i]);
+ usdhc_cfg[i].max_bus_width = 4;
+ fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
+ enable_usdhc_clk(1, i);
+ }
+
+ return 0;
+}
+#endif
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts("Board: CM-FX6\n");
+ return 0;
+}
+
+static ulong bank1_size;
+static ulong bank2_size;
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = bank1_size;
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = bank2_size;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = imx_ddr_size();
+ switch (gd->ram_size) {
+ case 0x10000000: /* DDR_16BIT_256MB */
+ bank1_size = 0x10000000;
+ bank2_size = 0;
+ break;
+ case 0x20000000: /* DDR_32BIT_512MB */
+ bank1_size = 0x20000000;
+ bank2_size = 0;
+ break;
+ case 0x40000000:
+ if (is_cpu_type(MXC_CPU_MX6SOLO)) { /* DDR_32BIT_1GB */
+ bank1_size = 0x20000000;
+ bank2_size = 0x20000000;
+ } else { /* DDR_64BIT_1GB */
+ bank1_size = 0x40000000;
+ bank2_size = 0;
+ }
+ break;
+ case 0x80000000: /* DDR_64BIT_2GB */
+ bank1_size = 0x40000000;
+ bank2_size = 0x40000000;
+ break;
+ case 0xF0000000: /* DDR_64BIT_4GB */
+ bank1_size = 0x70000000;
+ bank2_size = 0x7FF00000;
+ gd->ram_size -= 0x100000;
+ break;
+ default:
+ printf("ERROR: Unsupported DRAM size 0x%lx\n", gd->ram_size);
+ return -1;
+ }
+
+ return 0;
+}
+
+u32 get_board_rev(void)
+{
+ return 100;
+}
diff --git a/board/compulab/cm_fx6/common.c b/board/compulab/cm_fx6/common.c
new file mode 100644
index 0000000..a2d9ca4
--- /dev/null
+++ b/board/compulab/cm_fx6/common.c
@@ -0,0 +1,83 @@
+/*
+ * Code used by both U-Boot and SPL for Compulab CM-FX6
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Nikita Kiryanov <nikita@compulab.co.il>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include "common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_FSL_ESDHC
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const usdhc_pads[] = {
+ IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+
+ IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+
+ IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
+};
+
+void cm_fx6_set_usdhc_iomux(void)
+{
+ SETUP_IOMUX_PADS(usdhc_pads);
+}
+
+/* CINS bit doesn't work, so always try to access the MMC card */
+int board_mmc_getcd(struct mmc *mmc)
+{
+ return 1;
+}
+#endif
+
+#ifdef CONFIG_MXC_SPI
+#define ECSPI_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \
+ PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const ecspi_pads[] = {
+ IOMUX_PADS(PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_D19__ECSPI1_SS1 | MUX_PAD_CTRL(ECSPI_PAD_CTRL)),
+};
+
+void cm_fx6_set_ecspi_iomux(void)
+{
+ SETUP_IOMUX_PADS(ecspi_pads);
+}
+
+int board_spi_cs_gpio(unsigned bus, unsigned cs)
+{
+ return (bus == 0 && cs == 0) ? (CM_FX6_ECSPI_BUS0_CS0) : -1;
+}
+#endif
diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h
new file mode 100644
index 0000000..05eab34
--- /dev/null
+++ b/board/compulab/cm_fx6/common.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Nikita Kiryanov <nikita@compulab.co.il>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <asm/arch/mx6-pins.h>
+#include <asm/arch/clock.h>
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define CM_FX6_ECSPI_BUS0_CS0 IMX_GPIO_NR(2, 30)
+#define CM_FX6_GREEN_LED IMX_GPIO_NR(2, 31)
+
+#if defined(CONFIG_FSL_ESDHC)
+#include <fsl_esdhc.h>
+
+static __maybe_unused struct fsl_esdhc_cfg usdhc_cfg[3] = {
+ {USDHC1_BASE_ADDR},
+ {USDHC2_BASE_ADDR},
+ {USDHC3_BASE_ADDR},
+};
+
+static __maybe_unused enum mxc_clock usdhc_clk[3] = {
+ MXC_ESDHC_CLK,
+ MXC_ESDHC2_CLK,
+ MXC_ESDHC3_CLK,
+};
+#endif
+
+void cm_fx6_set_usdhc_iomux(void);
+void cm_fx6_set_ecspi_iomux(void);
diff --git a/board/compulab/cm_fx6/imximage.cfg b/board/compulab/cm_fx6/imximage.cfg
new file mode 100644
index 0000000..8e7ec91
--- /dev/null
+++ b/board/compulab/cm_fx6/imximage.cfg
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+IMAGE_VERSION 2
+BOOT_FROM sd
diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c
new file mode 100644
index 0000000..9f9e5f8
--- /dev/null
+++ b/board/compulab/cm_fx6/spl.c
@@ -0,0 +1,400 @@
+/*
+ * SPL specific code for Compulab CM-FX6 board
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Nikita Kiryanov <nikita@compulab.co.il>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/arch/mx6-ddr.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/imx-common/iomux-v3.h>
+#include <fsl_esdhc.h>
+#include "common.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum ddr_config {
+ DDR_16BIT_256MB,
+ DDR_32BIT_512MB,
+ DDR_32BIT_1GB,
+ DDR_64BIT_1GB,
+ DDR_64BIT_2GB,
+ DDR_64BIT_4GB,
+ DDR_UNKNOWN,
+};
+
+static void spl_mx6s_dram_setup_iomux(void)
+{
+ struct mx6sdl_iomux_ddr_regs ddr_iomux;
+ struct mx6sdl_iomux_grp_regs grp_iomux;
+
+ ddr_iomux.dram_sdqs0 = 0x00000038;
+ ddr_iomux.dram_sdqs1 = 0x00000038;
+ ddr_iomux.dram_sdqs2 = 0x00000038;
+ ddr_iomux.dram_sdqs3 = 0x00000038;
+ ddr_iomux.dram_sdqs4 = 0x00000038;
+ ddr_iomux.dram_sdqs5 = 0x00000038;
+ ddr_iomux.dram_sdqs6 = 0x00000038;
+ ddr_iomux.dram_sdqs7 = 0x00000038;
+ ddr_iomux.dram_dqm0 = 0x00000038;
+ ddr_iomux.dram_dqm1 = 0x00000038;
+ ddr_iomux.dram_dqm2 = 0x00000038;
+ ddr_iomux.dram_dqm3 = 0x00000038;
+ ddr_iomux.dram_dqm4 = 0x00000038;
+ ddr_iomux.dram_dqm5 = 0x00000038;
+ ddr_iomux.dram_dqm6 = 0x00000038;
+ ddr_iomux.dram_dqm7 = 0x00000038;
+ ddr_iomux.dram_cas = 0x00000038;
+ ddr_iomux.dram_ras = 0x00000038;
+ ddr_iomux.dram_sdclk_0 = 0x00000038;
+ ddr_iomux.dram_sdclk_1 = 0x00000038;
+ ddr_iomux.dram_sdcke0 = 0x00003000;
+ ddr_iomux.dram_sdcke1 = 0x00003000;
+ /*
+ * Below DRAM_RESET[DDR_SEL] = 0 which is incorrect according to
+ * Freescale QRM, but this is exactly the value used by the automatic
+ * calibration script and it works also in all our tests, so we leave
+ * it as is at this point.
+ */
+ ddr_iomux.dram_reset = 0x00000038;
+ ddr_iomux.dram_sdba2 = 0x00000000;
+ ddr_iomux.dram_sdodt0 = 0x00000038;
+ ddr_iomux.dram_sdodt1 = 0x00000038;
+ grp_iomux.grp_b0ds = 0x00000038;
+ grp_iomux.grp_b1ds = 0x00000038;
+ grp_iomux.grp_b2ds = 0x00000038;
+ grp_iomux.grp_b3ds = 0x00000038;
+ grp_iomux.grp_b4ds = 0x00000038;
+ grp_iomux.grp_b5ds = 0x00000038;
+ grp_iomux.grp_b6ds = 0x00000038;
+ grp_iomux.grp_b7ds = 0x00000038;
+ grp_iomux.grp_addds = 0x00000038;
+ grp_iomux.grp_ddrmode_ctl = 0x00020000;
+ grp_iomux.grp_ddrpke = 0x00000000;
+ grp_iomux.grp_ddrmode = 0x00020000;
+ grp_iomux.grp_ctlds = 0x00000038;
+ grp_iomux.grp_ddr_type = 0x000C0000;
+ mx6sdl_dram_iocfg(64, &ddr_iomux, &grp_iomux);
+}
+
+static void spl_mx6q_dram_setup_iomux(void)
+{
+ struct mx6dq_iomux_ddr_regs ddr_iomux;
+ struct mx6dq_iomux_grp_regs grp_iomux;
+
+ ddr_iomux.dram_sdqs0 = 0x00000038;
+ ddr_iomux.dram_sdqs1 = 0x00000038;
+ ddr_iomux.dram_sdqs2 = 0x00000038;
+ ddr_iomux.dram_sdqs3 = 0x00000038;
+ ddr_iomux.dram_sdqs4 = 0x00000038;
+ ddr_iomux.dram_sdqs5 = 0x00000038;
+ ddr_iomux.dram_sdqs6 = 0x00000038;
+ ddr_iomux.dram_sdqs7 = 0x00000038;
+ ddr_iomux.dram_dqm0 = 0x00000038;
+ ddr_iomux.dram_dqm1 = 0x00000038;
+ ddr_iomux.dram_dqm2 = 0x00000038;
+ ddr_iomux.dram_dqm3 = 0x00000038;
+ ddr_iomux.dram_dqm4 = 0x00000038;
+ ddr_iomux.dram_dqm5 = 0x00000038;
+ ddr_iomux.dram_dqm6 = 0x00000038;
+ ddr_iomux.dram_dqm7 = 0x00000038;
+ ddr_iomux.dram_cas = 0x00000038;
+ ddr_iomux.dram_ras = 0x00000038;
+ ddr_iomux.dram_sdclk_0 = 0x00000038;
+ ddr_iomux.dram_sdclk_1 = 0x00000038;
+ ddr_iomux.dram_sdcke0 = 0x00003000;
+ ddr_iomux.dram_sdcke1 = 0x00003000;
+ /*
+ * Below DRAM_RESET[DDR_SEL] = 0 which is incorrect according to
+ * Freescale QRM, but this is exactly the value used by the automatic
+ * calibration script and it works also in all our tests, so we leave
+ * it as is at this point.
+ */
+ ddr_iomux.dram_reset = 0x00000038;
+ ddr_iomux.dram_sdba2 = 0x00000000;
+ ddr_iomux.dram_sdodt0 = 0x00000038;
+ ddr_iomux.dram_sdodt1 = 0x00000038;
+ grp_iomux.grp_b0ds = 0x00000038;
+ grp_iomux.grp_b1ds = 0x00000038;
+ grp_iomux.grp_b2ds = 0x00000038;
+ grp_iomux.grp_b3ds = 0x00000038;
+ grp_iomux.grp_b4ds = 0x00000038;
+ grp_iomux.grp_b5ds = 0x00000038;
+ grp_iomux.grp_b6ds = 0x00000038;
+ grp_iomux.grp_b7ds = 0x00000038;
+ grp_iomux.grp_addds = 0x00000038;
+ grp_iomux.grp_ddrmode_ctl = 0x00020000;
+ grp_iomux.grp_ddrpke = 0x00000000;
+ grp_iomux.grp_ddrmode = 0x00020000;
+ grp_iomux.grp_ctlds = 0x00000038;
+ grp_iomux.grp_ddr_type = 0x000C0000;
+ mx6dq_dram_iocfg(64, &ddr_iomux, &grp_iomux);
+}
+
+static void spl_mx6s_dram_init(enum ddr_config dram_config, int reset)
+{
+ struct mx6_mmdc_calibration calib;
+ struct mx6_ddr_sysinfo sysinfo;
+ struct mx6_ddr3_cfg ddr3_cfg;
+
+ if (reset)
+ ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2;
+
+ calib.p0_mpwldectrl0 = 0x005B0061;
+ calib.p0_mpwldectrl1 = 0x004F0055;
+ calib.p0_mpdgctrl0 = 0x0314030C;
+ calib.p0_mpdgctrl1 = 0x025C0268;
+ calib.p0_mprddlctl = 0x42464646;
+ calib.p0_mpwrdlctl = 0x36322C34;
+ ddr3_cfg.mem_speed = 800;
+ ddr3_cfg.density = 4;
+ ddr3_cfg.rowaddr = 14;
+ ddr3_cfg.coladdr = 10;
+ ddr3_cfg.pagesz = 2;
+ ddr3_cfg.trcd = 1800;
+ ddr3_cfg.trcmin = 5200;
+ ddr3_cfg.trasmin = 3600;
+ ddr3_cfg.SRT = 0;
+ sysinfo.cs1_mirror = 1;
+ sysinfo.cs_density = 16;
+ sysinfo.bi_on = 1;
+ sysinfo.rtt_nom = 1;
+ sysinfo.rtt_wr = 0;
+ sysinfo.ralat = 5;
+ sysinfo.walat = 1;
+ sysinfo.mif3_mode = 3;
+ sysinfo.rst_to_cke = 0x23;
+ sysinfo.sde_to_rst = 0x10;
+ switch (dram_config) {
+ case DDR_16BIT_256MB:
+ sysinfo.dsize = 0;
+ sysinfo.ncs = 1;
+ break;
+ case DDR_32BIT_512MB:
+ sysinfo.dsize = 1;
+ sysinfo.ncs = 1;
+ break;
+ case DDR_32BIT_1GB:
+ sysinfo.dsize = 1;
+ sysinfo.ncs = 2;
+ break;
+ default:
+ puts("Tried to setup invalid DDR configuration\n");
+ hang();
+ }
+
+ mx6_dram_cfg(&sysinfo, &calib, &ddr3_cfg);
+ udelay(100);
+}
+
+static void spl_mx6q_dram_init(enum ddr_config dram_config, int reset)
+{
+ struct mx6_mmdc_calibration calib;
+ struct mx6_ddr_sysinfo sysinfo;
+ struct mx6_ddr3_cfg ddr3_cfg;
+
+ if (reset)
+ ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2;
+
+ calib.p0_mpwldectrl0 = 0x00630068;
+ calib.p0_mpwldectrl1 = 0x0068005D;
+ calib.p0_mpdgctrl0 = 0x04140428;
+ calib.p0_mpdgctrl1 = 0x037C037C;
+ calib.p0_mprddlctl = 0x3C30303A;
+ calib.p0_mpwrdlctl = 0x3A344038;
+ calib.p1_mpwldectrl0 = 0x0035004C;
+ calib.p1_mpwldectrl1 = 0x00170026;
+ calib.p1_mpdgctrl0 = 0x0374037C;
+ calib.p1_mpdgctrl1 = 0x0350032C;
+ calib.p1_mprddlctl = 0x30322A3C;
+ calib.p1_mpwrdlctl = 0x48304A3E;
+ ddr3_cfg.mem_speed = 1066;
+ ddr3_cfg.density = 4;
+ ddr3_cfg.rowaddr = 14;
+ ddr3_cfg.coladdr = 10;
+ ddr3_cfg.pagesz = 2;
+ ddr3_cfg.trcd = 1324;
+ ddr3_cfg.trcmin = 59500;
+ ddr3_cfg.trasmin = 9750;
+ ddr3_cfg.SRT = 0;
+ sysinfo.cs_density = 16;
+ sysinfo.cs1_mirror = 1;
+ sysinfo.bi_on = 1;
+ sysinfo.rtt_nom = 1;
+ sysinfo.rtt_wr = 0;
+ sysinfo.ralat = 5;
+ sysinfo.walat = 1;
+ sysinfo.mif3_mode = 3;
+ sysinfo.rst_to_cke = 0x23;
+ sysinfo.sde_to_rst = 0x10;
+ switch (dram_config) {
+ case DDR_16BIT_256MB:
+ sysinfo.dsize = 0;
+ sysinfo.ncs = 1;
+ break;
+ case DDR_32BIT_512MB:
+ sysinfo.dsize = 1;
+ sysinfo.ncs = 1;
+ break;
+ case DDR_64BIT_1GB:
+ sysinfo.dsize = 2;
+ sysinfo.ncs = 1;
+ break;
+ case DDR_64BIT_2GB:
+ sysinfo.dsize = 2;
+ sysinfo.ncs = 2;
+ break;
+ case DDR_64BIT_4GB:
+ sysinfo.dsize = 2;
+ sysinfo.ncs = 2;
+ ddr3_cfg.rowaddr = 15;
+ break;
+ default:
+ puts("Tried to setup invalid DDR configuration\n");
+ hang();
+ }
+
+ mx6_dram_cfg(&sysinfo, &calib, &ddr3_cfg);
+ udelay(100);
+}
+
+static int cm_fx6_spl_dram_init(void)
+{
+ u32 cpurev, imxtype;
+ unsigned long bank1_size, bank2_size;
+
+ cpurev = get_cpu_rev();
+ imxtype = (cpurev & 0xFF000) >> 12;
+
+ switch (imxtype) {
+ case MXC_CPU_MX6SOLO:
+ spl_mx6s_dram_setup_iomux();
+
+ spl_mx6s_dram_init(DDR_32BIT_1GB, 0);
+ bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
+ if (bank1_size == 0x40000000)
+ return 0;
+
+ if (bank1_size == 0x20000000) {
+ spl_mx6s_dram_init(DDR_32BIT_512MB, 1);
+ return 0;
+ }
+
+ spl_mx6s_dram_init(DDR_16BIT_256MB, 1);
+ bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
+ if (bank1_size == 0x10000000)
+ return 0;
+
+ break;
+ case MXC_CPU_MX6D:
+ case MXC_CPU_MX6Q:
+ spl_mx6q_dram_setup_iomux();
+
+ spl_mx6q_dram_init(DDR_64BIT_4GB, 0);
+ bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
+ if (bank1_size == 0x80000000)
+ return 0;
+
+ if (bank1_size == 0x40000000) {
+ bank2_size = get_ram_size((long int *)PHYS_SDRAM_2,
+ 0x80000000);
+ if (bank2_size == 0x40000000) {
+ /* Don't do a full reset here */
+ spl_mx6q_dram_init(DDR_64BIT_2GB, 0);
+ } else {
+ spl_mx6q_dram_init(DDR_64BIT_1GB, 1);
+ }
+
+ return 0;
+ }
+
+ spl_mx6q_dram_init(DDR_32BIT_512MB, 1);
+ bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
+ if (bank1_size == 0x20000000)
+ return 0;
+
+ spl_mx6q_dram_init(DDR_16BIT_256MB, 1);
+ bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
+ if (bank1_size == 0x10000000)
+ return 0;
+
+ break;
+ }
+
+ return -1;
+}
+
+static iomux_v3_cfg_t const uart4_pads[] = {
+ IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+ IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+
+static void cm_fx6_setup_uart(void)
+{
+ SETUP_IOMUX_PADS(uart4_pads);
+ enable_uart_clk(1);
+}
+
+#ifdef CONFIG_SPL_SPI_SUPPORT
+static void cm_fx6_setup_ecspi(void)
+{
+ enable_cspi_clock(1, 0);
+ cm_fx6_set_ecspi_iomux();
+}
+#else
+static void cm_fx6_setup_ecspi(void) { }
+#endif
+
+void board_init_f(ulong dummy)
+{
+ gd = &gdata;
+ enable_usdhc_clk(1, 2);
+ arch_cpu_init();
+ timer_init();
+ cm_fx6_setup_ecspi();
+ cm_fx6_setup_uart();
+ get_clocks();
+ preloader_console_init();
+ gpio_direction_output(CM_FX6_GREEN_LED, 1);
+ if (cm_fx6_spl_dram_init()) {
+ puts("!!!ERROR!!! DRAM detection failed!!!\n");
+ hang();
+ }
+
+ memset(__bss_start, 0, __bss_end - __bss_start);
+ board_init_r(NULL, 0);
+}
+
+void spl_board_init(void)
+{
+ uint soc_sbmr = readl(SRC_BASE_ADDR + 0x4);
+ uint bt_mem_ctl = (soc_sbmr & 0x000000FF) >> 4;
+ uint bt_mem_type = (soc_sbmr & 0x00000008) >> 3;
+
+ if (bt_mem_ctl == 0x3 && !bt_mem_type)
+ puts("Booting from SPI flash\n");
+ else if (bt_mem_ctl == 0x4 || bt_mem_ctl == 0x5)
+ puts("Booting from MMC\n");
+ else
+ puts("Unknown boot device\n");
+}
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+int board_mmc_init(bd_t *bis)
+{
+ cm_fx6_set_usdhc_iomux();
+
+ usdhc_cfg[2].sdhc_clk = mxc_get_clock(usdhc_clk[2]);
+ usdhc_cfg[2].max_bus_width = 4;
+
+ return fsl_esdhc_initialize(bis, &usdhc_cfg[2]);
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index e3a0726..308b94e 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -334,6 +334,8 @@ Active arm armv7 mx6 freescale mx6sabresd
Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam <fabio.estevam@freescale.com>
Active arm armv7 mx6 gateworks gw_ventana gwventana gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6QDL,SPL Tim Harvey <tharvey@gateworks.com>
Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton <jon.nettleton@gmail.com>
+Active arm armv7 mx6 compulab cm_fx6 cm_fx6
+- Nikita Kiryanov <nikita@compulab.co.il>
Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman <sakoman@gmail.com>
Active arm armv7 omap3 - pandora omap3_pandora - Grazvydas Ignotas <notasas@gmail.com>
Active arm armv7 omap3 8dtech eco5pk eco5pk - Raphael Assenat <raph@8d.com>
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
new file mode 100644
index 0000000..b877b65
--- /dev/null
+++ b/include/configs/cm_fx6.h
@@ -0,0 +1,211 @@
+/*
+ * Config file for Compulab CM-FX6 board
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Nikita Kiryanov <nikita@compulab.co.il>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_CM_FX6_H
+#define __CONFIG_CM_FX6_H
+
+#include <asm/arch/imx-regs.h>
+#include <config_distro_defaults.h>
+
+#define CONFIG_SYS_L2CACHE_OFF
+#include "mx6_common.h"
+
+/* Machine config */
+#define CONFIG_MX6
+#define CONFIG_MX6QDL
+#define CONFIG_CM_FX6
+#define CONFIG_SYS_LITTLE_ENDIAN
+#define CONFIG_MACH_TYPE 4273
+#define CONFIG_SYS_HZ 1000
+
+/* Display information on boot */
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_TIMESTAMP
+
+/* CMD */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_GREPENV
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_XIMG
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+
+/* MMC */
+#define CONFIG_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_FSL_USDHC
+#define CONFIG_SYS_FSL_USDHC_NUM 3
+#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
+
+/* RAM */
+#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
+#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_NR_DRAM_BANKS 2
+#define CONFIG_SYS_MEMTEST_START 0x10000000
+#define CONFIG_SYS_MEMTEST_END 0x10010000
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* Serial console */
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE UART4_BASE
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
+
+/* Shell */
+#define CONFIG_SYS_PROMPT "CM-FX6 # "
+#define CONFIG_SYS_CBSIZE 1024
+#define CONFIG_SYS_MAXARGS 16
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/* SPI flash */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_CMD_SF
+#define CONFIG_SF_DEFAULT_BUS 0
+#define CONFIG_SF_DEFAULT_CS 0
+#define CONFIG_SF_DEFAULT_SPEED 25000000
+#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
+
+/* Environment */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_ENV_IS_IN_SPI_FLASH
+#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
+#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
+#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
+#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
+#define CONFIG_ENV_SECT_SIZE (64 * 1024)
+#define CONFIG_ENV_SIZE (8 * 1024)
+#define CONFIG_ENV_OFFSET (768 * 1024)
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "kernel=uImage-cm-fx6\0" \
+ "autoload=no\0" \
+ "loadaddr=0x10800000\0" \
+ "fdtaddr=0x11000000\0" \
+ "console=ttymxc3,115200\0" \
+ "ethprime=FEC0\0" \
+ "bootscr=boot.scr\0" \
+ "bootm_low=18000000\0" \
+ "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32 at 50,if=RGB32\0" \
+ "video_dvi=mxcfb0:dev=dvi,1280x800M-32 at 50,if=RGB32\0" \
+ "fdtfile=cm-fx6.dtb\0" \
+ "doboot=bootm ${loadaddr}\0" \
+ "loadfdt=false\0" \
+ "setboottypez=setenv kernel zImage-cm-fx6;" \
+ "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
+ "setenv loadfdt true;\0" \
+ "setboottypem=setenv kernel uImage-cm-fx6;" \
+ "setenv doboot bootm ${loadaddr};" \
+ "setenv loadfdt false;\0"\
+ "run_eboot=echo Starting EBOOT ...; "\
+ "mmc dev ${mmcdev} && " \
+ "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
+ "mmcdev=2\0" \
+ "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
+ "loadmmcbootscript=fatload mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
+ "mmcbootscript=echo Running bootscript from mmc ...; "\
+ "source ${loadaddr}\0" \
+ "mmcargs=setenv bootargs console=${console} " \
+ "root=${mmcroot} " \
+ "${video}\0" \
+ "mmcloadkernel=fatload mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
+ "mmcloadfdt=fatload mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "run doboot\0" \
+ "nandroot=/dev/mtdblock4 rw\0" \
+ "nandrootfstype=ubifs\0" \
+ "nandargs=setenv bootargs console=${console} " \
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype} " \
+ "${video}\0" \
+ "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
+ "nandboot=echo Booting from nand ...; " \
+ "run nandargs; " \
+ "nand read ${loadaddr} 0 780000; " \
+ "if ${loadfdt}; then " \
+ "run nandloadfdt;" \
+ "fi; " \
+ "run doboot\0" \
+ "boot=mmc dev ${mmcdev}; " \
+ "if mmc rescan; then " \
+ "if run loadmmcbootscript; then " \
+ "run mmcbootscript;" \
+ "else " \
+ "if run mmcloadkernel; then " \
+ "if ${loadfdt}; then " \
+ "run mmcloadfdt;" \
+ "fi;" \
+ "run mmcboot;" \
+ "fi;" \
+ "fi;" \
+ "fi;"
+
+#define CONFIG_BOOTCOMMAND \
+ "run setboottypem; run boot"
+
+/* SPI */
+#define CONFIG_SPI
+#define CONFIG_MXC_SPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_ATMEL
+#define CONFIG_SPI_FLASH_EON
+#define CONFIG_SPI_FLASH_GIGADEVICE
+#define CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_SPI_FLASH_SPANSION
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SPI_FLASH_WINBOND
+
+/* GPIO */
+#define CONFIG_MXC_GPIO
+
+/* Boot */
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_LOADADDR 0x10800000
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
+#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+
+/* misc */
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_STACKSIZE (128 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
+
+/* SPL */
+#define CONFIG_SPL
+#include "imx6_spl.h"
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
+#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
+#define CONFIG_SPL_SPI_LOAD
+
+#endif /* __CONFIG_CM_FX6_H */
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V3 12/18] arm: mx6: add support for Compulab cm-fx6 CoM
2014-08-11 16:22 ` [U-Boot] [PATCH V3 " Nikita Kiryanov
@ 2014-08-12 14:48 ` Simon Glass
2014-08-13 10:57 ` Nikita Kiryanov
2014-08-13 12:55 ` Igor Grinberg
1 sibling, 1 reply; 34+ messages in thread
From: Simon Glass @ 2014-08-12 14:48 UTC (permalink / raw)
To: u-boot
Hi Nikita,
On 11 August 2014 10:22, Nikita Kiryanov <nikita@compulab.co.il> wrote:
> Add initial support for Compulab CM-FX6 CoM.
> Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.
>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Tom Rini <trini@ti.com>
> Cc: Marek Vasut <marex@denx.de>
> Acked-by: Marek Vasut <marex@denx.de>
> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
> ---
> Changes in V3:
> - Remove CONFIG_SYS_TEXT_BASE from config file to not clash with the
> one supplied by imx6_spl.h
>
> Changes in V2:
> - Remove unnecessary line removal from arch/arm/cpu/armv7/mx6/ddr.c
> - Move probe_mmdc_config() code straight to dram_init()
> - Use imx6_spl.h
> - Use imx_ddr_size()
> NOTE: the correctness of this patch now depends on https://patchwork.ozlabs.org/patch/376095/
>
> board/compulab/cm_fx6/Makefile | 12 ++
> board/compulab/cm_fx6/cm_fx6.c | 98 +++++++++
> board/compulab/cm_fx6/common.c | 83 ++++++++
> board/compulab/cm_fx6/common.h | 36 ++++
> board/compulab/cm_fx6/imximage.cfg | 8 +
> board/compulab/cm_fx6/spl.c | 400 +++++++++++++++++++++++++++++++++++++
> boards.cfg | 2 +
> include/configs/cm_fx6.h | 211 +++++++++++++++++++
I think you need Kconfig etc. here? Also we don't use boards.cfg
anymore. I pushed a tree to u-boot-x86.git branch cm_fx6 which hacks
in a few of these things as an example (enough to make it build
anyway).
> 8 files changed, 850 insertions(+)
> create mode 100644 board/compulab/cm_fx6/Makefile
> create mode 100644 board/compulab/cm_fx6/cm_fx6.c
> create mode 100644 board/compulab/cm_fx6/common.c
> create mode 100644 board/compulab/cm_fx6/common.h
> create mode 100644 board/compulab/cm_fx6/imximage.cfg
> create mode 100644 board/compulab/cm_fx6/spl.c
> create mode 100644 include/configs/cm_fx6.h
>
> diff --git a/board/compulab/cm_fx6/Makefile b/board/compulab/cm_fx6/Makefile
> new file mode 100644
> index 0000000..3e5c903
> --- /dev/null
> +++ b/board/compulab/cm_fx6/Makefile
> @@ -0,0 +1,12 @@
> +#
> +# (C) Copyright 2014 CompuLab, Ltd. <www.compulab.co.il>
> +#
> +# Authors: Nikita Kiryanov <nikita@compulab.co.il>
> +#
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +ifdef CONFIG_SPL_BUILD
> +obj-y = common.o spl.o
> +else
> +obj-y = common.o cm_fx6.o
> +endif
Note this doesn't apply or build for me on mainline due to missing
Kconfig stuff. I might be missing a patch.
> diff --git a/boards.cfg b/boards.cfg
> index e3a0726..308b94e 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -334,6 +334,8 @@ Active arm armv7 mx6 freescale mx6sabresd
> Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam <fabio.estevam@freescale.com>
> Active arm armv7 mx6 gateworks gw_ventana gwventana gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6QDL,SPL Tim Harvey <tharvey@gateworks.com>
> Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton <jon.nettleton@gmail.com>
> +Active arm armv7 mx6 compulab cm_fx6 cm_fx6
> +- Nikita Kiryanov <nikita@compulab.co.il>
> Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman <sakoman@gmail.com>
> Active arm armv7 omap3 - pandora omap3_pandora - Grazvydas Ignotas <notasas@gmail.com>
> Active arm armv7 omap3 8dtech eco5pk eco5pk - Raphael Assenat <raph@8d.com>
We don't use this file anymore.
> diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
> new file mode 100644
> index 0000000..b877b65
> --- /dev/null
> +++ b/include/configs/cm_fx6.h
> @@ -0,0 +1,211 @@
> +/*
> + * Config file for Compulab CM-FX6 board
> + *
> + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
> + *
> + * Author: Nikita Kiryanov <nikita@compulab.co.il>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_CM_FX6_H
> +#define __CONFIG_CM_FX6_H
> +
> +#include <asm/arch/imx-regs.h>
> +#include <config_distro_defaults.h>
> +
> +#define CONFIG_SYS_L2CACHE_OFF
> +#include "mx6_common.h"
> +
> +/* Machine config */
> +#define CONFIG_MX6
> +#define CONFIG_MX6QDL
> +#define CONFIG_CM_FX6
Should these three be defined in the Kconfig file instead? What does
CONFIG_CM_FX6 represent? There might be a CONFIG_TARGET_CM_FX6 defined
by Kconfig.
> +#define CONFIG_SYS_LITTLE_ENDIAN
> +#define CONFIG_MACH_TYPE 4273
> +#define CONFIG_SYS_HZ 1000
> +
> +/* Display information on boot */
> +#define CONFIG_DISPLAY_CPUINFO
> +#define CONFIG_DISPLAY_BOARDINFO
> +#define CONFIG_TIMESTAMP
> +
> +/* CMD */
> +#include <config_cmd_default.h>
> +#define CONFIG_CMD_GREPENV
> +#undef CONFIG_CMD_FLASH
> +#undef CONFIG_CMD_LOADB
> +#undef CONFIG_CMD_LOADS
> +#undef CONFIG_CMD_XIMG
> +#undef CONFIG_CMD_FPGA
> +#undef CONFIG_CMD_IMLS
> +#undef CONFIG_CMD_NET
> +#undef CONFIG_CMD_NFS
> +
> +/* MMC */
> +#define CONFIG_MMC
> +#define CONFIG_CMD_MMC
> +#define CONFIG_GENERIC_MMC
> +#define CONFIG_FSL_ESDHC
> +#define CONFIG_FSL_USDHC
> +#define CONFIG_SYS_FSL_USDHC_NUM 3
> +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
> +
> +/* RAM */
> +#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR
> +#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR
> +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
> +#define CONFIG_NR_DRAM_BANKS 2
> +#define CONFIG_SYS_MEMTEST_START 0x10000000
> +#define CONFIG_SYS_MEMTEST_END 0x10010000
> +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
> +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
> +#define CONFIG_SYS_INIT_SP_OFFSET \
> + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
> +#define CONFIG_SYS_INIT_SP_ADDR \
> + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
> +
> +/* Serial console */
> +#define CONFIG_MXC_UART
> +#define CONFIG_MXC_UART_BASE UART4_BASE
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
> +
> +/* Shell */
> +#define CONFIG_SYS_PROMPT "CM-FX6 # "
> +#define CONFIG_SYS_CBSIZE 1024
> +#define CONFIG_SYS_MAXARGS 16
> +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
> +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
> + sizeof(CONFIG_SYS_PROMPT) + 16)
> +
> +/* SPI flash */
> +#define CONFIG_SYS_NO_FLASH
> +#define CONFIG_CMD_SF
> +#define CONFIG_SF_DEFAULT_BUS 0
> +#define CONFIG_SF_DEFAULT_CS 0
> +#define CONFIG_SF_DEFAULT_SPEED 25000000
> +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
> +
> +/* Environment */
> +#define CONFIG_ENV_OVERWRITE
> +#define CONFIG_ENV_IS_IN_SPI_FLASH
> +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
> +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
> +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
> +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
> +#define CONFIG_ENV_SECT_SIZE (64 * 1024)
> +#define CONFIG_ENV_SIZE (8 * 1024)
> +#define CONFIG_ENV_OFFSET (768 * 1024)
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> + "kernel=uImage-cm-fx6\0" \
> + "autoload=no\0" \
> + "loadaddr=0x10800000\0" \
> + "fdtaddr=0x11000000\0" \
> + "console=ttymxc3,115200\0" \
> + "ethprime=FEC0\0" \
> + "bootscr=boot.scr\0" \
> + "bootm_low=18000000\0" \
> + "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32 at 50,if=RGB32\0" \
> + "video_dvi=mxcfb0:dev=dvi,1280x800M-32 at 50,if=RGB32\0" \
> + "fdtfile=cm-fx6.dtb\0" \
> + "doboot=bootm ${loadaddr}\0" \
> + "loadfdt=false\0" \
> + "setboottypez=setenv kernel zImage-cm-fx6;" \
> + "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
> + "setenv loadfdt true;\0" \
> + "setboottypem=setenv kernel uImage-cm-fx6;" \
> + "setenv doboot bootm ${loadaddr};" \
> + "setenv loadfdt false;\0"\
> + "run_eboot=echo Starting EBOOT ...; "\
> + "mmc dev ${mmcdev} && " \
> + "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
> + "mmcdev=2\0" \
> + "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
> + "loadmmcbootscript=fatload mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
> + "mmcbootscript=echo Running bootscript from mmc ...; "\
> + "source ${loadaddr}\0" \
> + "mmcargs=setenv bootargs console=${console} " \
> + "root=${mmcroot} " \
> + "${video}\0" \
> + "mmcloadkernel=fatload mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
> + "mmcloadfdt=fatload mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
> + "mmcboot=echo Booting from mmc ...; " \
> + "run mmcargs; " \
> + "run doboot\0" \
> + "nandroot=/dev/mtdblock4 rw\0" \
> + "nandrootfstype=ubifs\0" \
> + "nandargs=setenv bootargs console=${console} " \
> + "root=${nandroot} " \
> + "rootfstype=${nandrootfstype} " \
> + "${video}\0" \
> + "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
> + "nandboot=echo Booting from nand ...; " \
> + "run nandargs; " \
> + "nand read ${loadaddr} 0 780000; " \
> + "if ${loadfdt}; then " \
> + "run nandloadfdt;" \
> + "fi; " \
> + "run doboot\0" \
> + "boot=mmc dev ${mmcdev}; " \
> + "if mmc rescan; then " \
> + "if run loadmmcbootscript; then " \
> + "run mmcbootscript;" \
> + "else " \
> + "if run mmcloadkernel; then " \
> + "if ${loadfdt}; then " \
> + "run mmcloadfdt;" \
> + "fi;" \
> + "run mmcboot;" \
> + "fi;" \
> + "fi;" \
> + "fi;"
> +
> +#define CONFIG_BOOTCOMMAND \
> + "run setboottypem; run boot"
> +
> +/* SPI */
> +#define CONFIG_SPI
> +#define CONFIG_MXC_SPI
> +#define CONFIG_SPI_FLASH
> +#define CONFIG_SPI_FLASH_ATMEL
> +#define CONFIG_SPI_FLASH_EON
> +#define CONFIG_SPI_FLASH_GIGADEVICE
> +#define CONFIG_SPI_FLASH_MACRONIX
> +#define CONFIG_SPI_FLASH_SPANSION
> +#define CONFIG_SPI_FLASH_STMICRO
> +#define CONFIG_SPI_FLASH_SST
> +#define CONFIG_SPI_FLASH_WINBOND
> +
> +/* GPIO */
> +#define CONFIG_MXC_GPIO
> +
> +/* Boot */
> +#define CONFIG_ZERO_BOOTDELAY_CHECK
> +#define CONFIG_LOADADDR 0x10800000
> +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
> +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> +#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_INITRD_TAG
> +
> +/* misc */
> +#define CONFIG_SYS_GENERIC_BOARD
> +#define CONFIG_STACKSIZE (128 * 1024)
> +#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
> +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
> +
> +/* SPL */
> +#define CONFIG_SPL
> +#include "imx6_spl.h"
> +#define CONFIG_SPL_BOARD_INIT
> +#define CONFIG_SPL_MMC_SUPPORT
> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */
> +#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024)
> +#define CONFIG_SPL_SPI_SUPPORT
> +#define CONFIG_SPL_SPI_FLASH_SUPPORT
> +#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
> +#define CONFIG_SPL_SPI_LOAD
> +
> +#endif /* __CONFIG_CM_FX6_H */
> --
> 1.9.1
>
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
Regards,
Simon
^ permalink raw reply [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V3 12/18] arm: mx6: add support for Compulab cm-fx6 CoM
2014-08-12 14:48 ` Simon Glass
@ 2014-08-13 10:57 ` Nikita Kiryanov
0 siblings, 0 replies; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-13 10:57 UTC (permalink / raw)
To: u-boot
Hi Simon,
On 12/08/14 17:48, Simon Glass wrote:
> Hi Nikita,
>
> On 11 August 2014 10:22, Nikita Kiryanov <nikita@compulab.co.il> wrote:
>> Add initial support for Compulab CM-FX6 CoM.
>> Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.
>>
[..snip..]
>> board/compulab/cm_fx6/common.h | 36 ++++
>> board/compulab/cm_fx6/imximage.cfg | 8 +
>> board/compulab/cm_fx6/spl.c | 400 +++++++++++++++++++++++++++++++++++++
>> boards.cfg | 2 +
>> include/configs/cm_fx6.h | 211 +++++++++++++++++++
>
> I think you need Kconfig etc. here? Also we don't use boards.cfg
> anymore. I pushed a tree to u-boot-x86.git branch cm_fx6 which hacks
> in a few of these things as an example (enough to make it build
> anyway).
>
[..snip..]
>> +#
>> +ifdef CONFIG_SPL_BUILD
>> +obj-y = common.o spl.o
>> +else
>> +obj-y = common.o cm_fx6.o
>> +endif
>
> Note this doesn't apply or build for me on mainline due to missing
> Kconfig stuff. I might be missing a patch.
>
>> diff --git a/boards.cfg b/boards.cfg
>> index e3a0726..308b94e 100644
>> --- a/boards.cfg
>> +++ b/boards.cfg
>> @@ -334,6 +334,8 @@ Active arm armv7 mx6 freescale mx6sabresd
>> Active arm armv7 mx6 freescale mx6slevk mx6slevk mx6slevk:IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL Fabio Estevam <fabio.estevam@freescale.com>
>> Active arm armv7 mx6 gateworks gw_ventana gwventana gw_ventana:IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6QDL,SPL Tim Harvey <tharvey@gateworks.com>
>> Active arm armv7 mx6 solidrun hummingboard hummingboard_solo hummingboard:IMX_CONFIG=board/solidrun/hummingboard/solo.cfg,MX6S,DDR_MB=512 Jon Nettleton <jon.nettleton@gmail.com>
>> +Active arm armv7 mx6 compulab cm_fx6 cm_fx6
>> +- Nikita Kiryanov <nikita@compulab.co.il>
>> Active arm armv7 omap3 - overo omap3_overo - Steve Sakoman <sakoman@gmail.com>
>> Active arm armv7 omap3 - pandora omap3_pandora - Grazvydas Ignotas <notasas@gmail.com>
>> Active arm armv7 omap3 8dtech eco5pk eco5pk - Raphael Assenat <raph@8d.com>
>
> We don't use this file anymore.
>
>> diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
>> new file mode 100644
[..snip..]
>> +
>> +/* Machine config */
>> +#define CONFIG_MX6
>> +#define CONFIG_MX6QDL
>> +#define CONFIG_CM_FX6
>
> Should these three be defined in the Kconfig file instead? What does
> CONFIG_CM_FX6 represent? There might be a CONFIG_TARGET_CM_FX6 defined
> by Kconfig.
>
>> +#define CONFIG_SYS_LITTLE_ENDIAN
>> +#define CONFIG_MACH_TYPE 4273
>> +#define CONFIG_SYS_HZ 1000
Yes you're correct. I was hoping this would be accepted before all the
Kconfig changes took effect but things didn't work out that way.
I'll rebase and post a new version.
>
> Regards,
> Simon
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V3 12/18] arm: mx6: add support for Compulab cm-fx6 CoM
2014-08-11 16:22 ` [U-Boot] [PATCH V3 " Nikita Kiryanov
2014-08-12 14:48 ` Simon Glass
@ 2014-08-13 12:55 ` Igor Grinberg
2014-08-14 7:16 ` Igor Grinberg
` (2 more replies)
1 sibling, 3 replies; 34+ messages in thread
From: Igor Grinberg @ 2014-08-13 12:55 UTC (permalink / raw)
To: u-boot
Hi Nikita,
Several comments below in addition to Simon's.
On 08/11/14 19:22, Nikita Kiryanov wrote:
> Add initial support for Compulab CM-FX6 CoM.
> Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.
>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Tom Rini <trini@ti.com>
> Cc: Marek Vasut <marex@denx.de>
> Acked-by: Marek Vasut <marex@denx.de>
> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
> ---
> Changes in V3:
> - Remove CONFIG_SYS_TEXT_BASE from config file to not clash with the
> one supplied by imx6_spl.h
>
> Changes in V2:
> - Remove unnecessary line removal from arch/arm/cpu/armv7/mx6/ddr.c
> - Move probe_mmdc_config() code straight to dram_init()
> - Use imx6_spl.h
> - Use imx_ddr_size()
> NOTE: the correctness of this patch now depends on https://patchwork.ozlabs.org/patch/376095/
>
> board/compulab/cm_fx6/Makefile | 12 ++
> board/compulab/cm_fx6/cm_fx6.c | 98 +++++++++
> board/compulab/cm_fx6/common.c | 83 ++++++++
> board/compulab/cm_fx6/common.h | 36 ++++
> board/compulab/cm_fx6/imximage.cfg | 8 +
> board/compulab/cm_fx6/spl.c | 400 +++++++++++++++++++++++++++++++++++++
> boards.cfg | 2 +
> include/configs/cm_fx6.h | 211 +++++++++++++++++++
> 8 files changed, 850 insertions(+)
> create mode 100644 board/compulab/cm_fx6/Makefile
> create mode 100644 board/compulab/cm_fx6/cm_fx6.c
> create mode 100644 board/compulab/cm_fx6/common.c
> create mode 100644 board/compulab/cm_fx6/common.h
> create mode 100644 board/compulab/cm_fx6/imximage.cfg
> create mode 100644 board/compulab/cm_fx6/spl.c
> create mode 100644 include/configs/cm_fx6.h
>
As Simon already said, if Kconfig is already in and boards.cfg
is already out, we should adjust the patch set to the new world.
[...]
> diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
> new file mode 100644
> index 0000000..47d17bb
> --- /dev/null
> +++ b/board/compulab/cm_fx6/cm_fx6.c
> @@ -0,0 +1,98 @@
[...]
> +#ifdef CONFIG_FSL_ESDHC
> +int board_mmc_init(bd_t *bis)
> +{
> + int i;
> +
> + cm_fx6_set_usdhc_iomux();
> + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
> + usdhc_cfg[i].sdhc_clk = mxc_get_clock(usdhc_clk[i]);
> + usdhc_cfg[i].max_bus_width = 4;
> + fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
> + enable_usdhc_clk(1, i);
Why does the board code needs to handle the mmc clocks?
Can't this be handled in the common code?
> + }
> +
> + return 0;
> +}
> +#endif
> +
> +int board_init(void)
> +{
> + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> + return 0;
> +}
> +
> +int checkboard(void)
> +{
> + puts("Board: CM-FX6\n");
> + return 0;
> +}
> +
> +static ulong bank1_size;
> +static ulong bank2_size;
> +
> +void dram_init_banksize(void)
> +{
> + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> + gd->bd->bi_dram[0].size = bank1_size;
> + gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
> + gd->bd->bi_dram[1].size = bank2_size;
> +}
> +
> +int dram_init(void)
> +{
> + gd->ram_size = imx_ddr_size();
> + switch (gd->ram_size) {
> + case 0x10000000: /* DDR_16BIT_256MB */
> + bank1_size = 0x10000000;
> + bank2_size = 0;
> + break;
> + case 0x20000000: /* DDR_32BIT_512MB */
> + bank1_size = 0x20000000;
> + bank2_size = 0;
> + break;
> + case 0x40000000:
> + if (is_cpu_type(MXC_CPU_MX6SOLO)) { /* DDR_32BIT_1GB */
> + bank1_size = 0x20000000;
> + bank2_size = 0x20000000;
> + } else { /* DDR_64BIT_1GB */
> + bank1_size = 0x40000000;
> + bank2_size = 0;
You don't need to init bank2_size to zero in all above cases.
> + }
> + break;
> + case 0x80000000: /* DDR_64BIT_2GB */
> + bank1_size = 0x40000000;
> + bank2_size = 0x40000000;
> + break;
> + case 0xF0000000: /* DDR_64BIT_4GB */
> + bank1_size = 0x70000000;
> + bank2_size = 0x7FF00000;
> + gd->ram_size -= 0x100000;
> + break;
> + default:
> + printf("ERROR: Unsupported DRAM size 0x%lx\n", gd->ram_size);
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +u32 get_board_rev(void)
> +{
> + return 100;
Hmmm... cl_eeprom_get_board_rev()?
> +}
[...]
> diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h
> new file mode 100644
> index 0000000..05eab34
> --- /dev/null
> +++ b/board/compulab/cm_fx6/common.h
> @@ -0,0 +1,36 @@
> +/*
> + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
> + *
> + * Author: Nikita Kiryanov <nikita@compulab.co.il>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <asm/arch/mx6-pins.h>
> +#include <asm/arch/clock.h>
> +
> +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
> + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
> + PAD_CTL_SRE_FAST | PAD_CTL_HYS)
> +
> +#define CM_FX6_ECSPI_BUS0_CS0 IMX_GPIO_NR(2, 30)
> +#define CM_FX6_GREEN_LED IMX_GPIO_NR(2, 31)
> +
> +#if defined(CONFIG_FSL_ESDHC)
> +#include <fsl_esdhc.h>
> +
> +static __maybe_unused struct fsl_esdhc_cfg usdhc_cfg[3] = {
> + {USDHC1_BASE_ADDR},
> + {USDHC2_BASE_ADDR},
> + {USDHC3_BASE_ADDR},
> +};
> +
> +static __maybe_unused enum mxc_clock usdhc_clk[3] = {
> + MXC_ESDHC_CLK,
> + MXC_ESDHC2_CLK,
> + MXC_ESDHC3_CLK,
> +};
Why do you need the above structures defined here in .h file?
Can they live in .c file that is using them?
I think cm_fx6.c is the appropriate place for these.
> +#endif
[...]
> diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c
> new file mode 100644
> index 0000000..9f9e5f8
> --- /dev/null
> +++ b/board/compulab/cm_fx6/spl.c
> @@ -0,0 +1,400 @@
> +/*
> + * SPL specific code for Compulab CM-FX6 board
> + *
> + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
> + *
> + * Author: Nikita Kiryanov <nikita@compulab.co.il>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include <common.h>
> +#include <spl.h>
> +#include <asm/io.h>
> +#include <asm/gpio.h>
> +#include <asm/arch/mx6-ddr.h>
> +#include <asm/arch/clock.h>
> +#include <asm/arch/sys_proto.h>
> +#include <asm/imx-common/iomux-v3.h>
> +#include <fsl_esdhc.h>
> +#include "common.h"
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +enum ddr_config {
> + DDR_16BIT_256MB,
> + DDR_32BIT_512MB,
> + DDR_32BIT_1GB,
> + DDR_64BIT_1GB,
> + DDR_64BIT_2GB,
> + DDR_64BIT_4GB,
> + DDR_UNKNOWN,
> +};
> +
> +static void spl_mx6s_dram_setup_iomux(void)
> +{
> + struct mx6sdl_iomux_ddr_regs ddr_iomux;
> + struct mx6sdl_iomux_grp_regs grp_iomux;
> +
> + ddr_iomux.dram_sdqs0 = 0x00000038;
> + ddr_iomux.dram_sdqs1 = 0x00000038;
> + ddr_iomux.dram_sdqs2 = 0x00000038;
> + ddr_iomux.dram_sdqs3 = 0x00000038;
> + ddr_iomux.dram_sdqs4 = 0x00000038;
> + ddr_iomux.dram_sdqs5 = 0x00000038;
> + ddr_iomux.dram_sdqs6 = 0x00000038;
> + ddr_iomux.dram_sdqs7 = 0x00000038;
> + ddr_iomux.dram_dqm0 = 0x00000038;
> + ddr_iomux.dram_dqm1 = 0x00000038;
> + ddr_iomux.dram_dqm2 = 0x00000038;
> + ddr_iomux.dram_dqm3 = 0x00000038;
> + ddr_iomux.dram_dqm4 = 0x00000038;
> + ddr_iomux.dram_dqm5 = 0x00000038;
> + ddr_iomux.dram_dqm6 = 0x00000038;
> + ddr_iomux.dram_dqm7 = 0x00000038;
> + ddr_iomux.dram_cas = 0x00000038;
> + ddr_iomux.dram_ras = 0x00000038;
> + ddr_iomux.dram_sdclk_0 = 0x00000038;
> + ddr_iomux.dram_sdclk_1 = 0x00000038;
> + ddr_iomux.dram_sdcke0 = 0x00003000;
> + ddr_iomux.dram_sdcke1 = 0x00003000;
> + /*
> + * Below DRAM_RESET[DDR_SEL] = 0 which is incorrect according to
> + * Freescale QRM, but this is exactly the value used by the automatic
> + * calibration script and it works also in all our tests, so we leave
> + * it as is at this point.
> + */
> + ddr_iomux.dram_reset = 0x00000038;
> + ddr_iomux.dram_sdba2 = 0x00000000;
> + ddr_iomux.dram_sdodt0 = 0x00000038;
> + ddr_iomux.dram_sdodt1 = 0x00000038;
> + grp_iomux.grp_b0ds = 0x00000038;
> + grp_iomux.grp_b1ds = 0x00000038;
> + grp_iomux.grp_b2ds = 0x00000038;
> + grp_iomux.grp_b3ds = 0x00000038;
> + grp_iomux.grp_b4ds = 0x00000038;
> + grp_iomux.grp_b5ds = 0x00000038;
> + grp_iomux.grp_b6ds = 0x00000038;
> + grp_iomux.grp_b7ds = 0x00000038;
> + grp_iomux.grp_addds = 0x00000038;
> + grp_iomux.grp_ddrmode_ctl = 0x00020000;
> + grp_iomux.grp_ddrpke = 0x00000000;
> + grp_iomux.grp_ddrmode = 0x00020000;
> + grp_iomux.grp_ctlds = 0x00000038;
> + grp_iomux.grp_ddr_type = 0x000C0000;
Hmmm... Can we do the above initializations statically?
I mean, define the structures outside of the function and initialize
them statically, and then only pass the structures to the below
function. Moreover, this way, you will not need this function at all,
but call the below from cm_fx6_spl_dram_init().
> + mx6sdl_dram_iocfg(64, &ddr_iomux, &grp_iomux);
> +}
> +
> +static void spl_mx6q_dram_setup_iomux(void)
> +{
> + struct mx6dq_iomux_ddr_regs ddr_iomux;
> + struct mx6dq_iomux_grp_regs grp_iomux;
> +
> + ddr_iomux.dram_sdqs0 = 0x00000038;
> + ddr_iomux.dram_sdqs1 = 0x00000038;
> + ddr_iomux.dram_sdqs2 = 0x00000038;
> + ddr_iomux.dram_sdqs3 = 0x00000038;
> + ddr_iomux.dram_sdqs4 = 0x00000038;
> + ddr_iomux.dram_sdqs5 = 0x00000038;
> + ddr_iomux.dram_sdqs6 = 0x00000038;
> + ddr_iomux.dram_sdqs7 = 0x00000038;
> + ddr_iomux.dram_dqm0 = 0x00000038;
> + ddr_iomux.dram_dqm1 = 0x00000038;
> + ddr_iomux.dram_dqm2 = 0x00000038;
> + ddr_iomux.dram_dqm3 = 0x00000038;
> + ddr_iomux.dram_dqm4 = 0x00000038;
> + ddr_iomux.dram_dqm5 = 0x00000038;
> + ddr_iomux.dram_dqm6 = 0x00000038;
> + ddr_iomux.dram_dqm7 = 0x00000038;
> + ddr_iomux.dram_cas = 0x00000038;
> + ddr_iomux.dram_ras = 0x00000038;
> + ddr_iomux.dram_sdclk_0 = 0x00000038;
> + ddr_iomux.dram_sdclk_1 = 0x00000038;
> + ddr_iomux.dram_sdcke0 = 0x00003000;
> + ddr_iomux.dram_sdcke1 = 0x00003000;
> + /*
> + * Below DRAM_RESET[DDR_SEL] = 0 which is incorrect according to
> + * Freescale QRM, but this is exactly the value used by the automatic
> + * calibration script and it works also in all our tests, so we leave
> + * it as is at this point.
> + */
> + ddr_iomux.dram_reset = 0x00000038;
> + ddr_iomux.dram_sdba2 = 0x00000000;
> + ddr_iomux.dram_sdodt0 = 0x00000038;
> + ddr_iomux.dram_sdodt1 = 0x00000038;
> + grp_iomux.grp_b0ds = 0x00000038;
> + grp_iomux.grp_b1ds = 0x00000038;
> + grp_iomux.grp_b2ds = 0x00000038;
> + grp_iomux.grp_b3ds = 0x00000038;
> + grp_iomux.grp_b4ds = 0x00000038;
> + grp_iomux.grp_b5ds = 0x00000038;
> + grp_iomux.grp_b6ds = 0x00000038;
> + grp_iomux.grp_b7ds = 0x00000038;
> + grp_iomux.grp_addds = 0x00000038;
> + grp_iomux.grp_ddrmode_ctl = 0x00020000;
> + grp_iomux.grp_ddrpke = 0x00000000;
> + grp_iomux.grp_ddrmode = 0x00020000;
> + grp_iomux.grp_ctlds = 0x00000038;
> + grp_iomux.grp_ddr_type = 0x000C0000;
same here?
> + mx6dq_dram_iocfg(64, &ddr_iomux, &grp_iomux);
> +}
> +
> +static void spl_mx6s_dram_init(enum ddr_config dram_config, int reset)
I think we have bool type in U-Boot, right?
If so, it would be more descriptive to have bool reset.
> +{
> + struct mx6_mmdc_calibration calib;
> + struct mx6_ddr_sysinfo sysinfo;
> + struct mx6_ddr3_cfg ddr3_cfg;
> +
> + if (reset)
> + ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2;
> +
> + calib.p0_mpwldectrl0 = 0x005B0061;
> + calib.p0_mpwldectrl1 = 0x004F0055;
> + calib.p0_mpdgctrl0 = 0x0314030C;
> + calib.p0_mpdgctrl1 = 0x025C0268;
> + calib.p0_mprddlctl = 0x42464646;
> + calib.p0_mpwrdlctl = 0x36322C34;
> + ddr3_cfg.mem_speed = 800;
> + ddr3_cfg.density = 4;
> + ddr3_cfg.rowaddr = 14;
> + ddr3_cfg.coladdr = 10;
> + ddr3_cfg.pagesz = 2;
> + ddr3_cfg.trcd = 1800;
> + ddr3_cfg.trcmin = 5200;
> + ddr3_cfg.trasmin = 3600;
> + ddr3_cfg.SRT = 0;
> + sysinfo.cs1_mirror = 1;
> + sysinfo.cs_density = 16;
> + sysinfo.bi_on = 1;
> + sysinfo.rtt_nom = 1;
> + sysinfo.rtt_wr = 0;
> + sysinfo.ralat = 5;
> + sysinfo.walat = 1;
> + sysinfo.mif3_mode = 3;
> + sysinfo.rst_to_cke = 0x23;
> + sysinfo.sde_to_rst = 0x10;
static init here?
> + switch (dram_config) {
> + case DDR_16BIT_256MB:
> + sysinfo.dsize = 0;
> + sysinfo.ncs = 1;
> + break;
> + case DDR_32BIT_512MB:
> + sysinfo.dsize = 1;
> + sysinfo.ncs = 1;
> + break;
> + case DDR_32BIT_1GB:
> + sysinfo.dsize = 1;
> + sysinfo.ncs = 2;
> + break;
> + default:
> + puts("Tried to setup invalid DDR configuration\n");
> + hang();
> + }
> +
> + mx6_dram_cfg(&sysinfo, &calib, &ddr3_cfg);
> + udelay(100);
> +}
> +
> +static void spl_mx6q_dram_init(enum ddr_config dram_config, int reset)
> +{
> + struct mx6_mmdc_calibration calib;
> + struct mx6_ddr_sysinfo sysinfo;
> + struct mx6_ddr3_cfg ddr3_cfg;
> +
> + if (reset)
> + ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2;
> +
> + calib.p0_mpwldectrl0 = 0x00630068;
> + calib.p0_mpwldectrl1 = 0x0068005D;
> + calib.p0_mpdgctrl0 = 0x04140428;
> + calib.p0_mpdgctrl1 = 0x037C037C;
> + calib.p0_mprddlctl = 0x3C30303A;
> + calib.p0_mpwrdlctl = 0x3A344038;
> + calib.p1_mpwldectrl0 = 0x0035004C;
> + calib.p1_mpwldectrl1 = 0x00170026;
> + calib.p1_mpdgctrl0 = 0x0374037C;
> + calib.p1_mpdgctrl1 = 0x0350032C;
> + calib.p1_mprddlctl = 0x30322A3C;
> + calib.p1_mpwrdlctl = 0x48304A3E;
> + ddr3_cfg.mem_speed = 1066;
> + ddr3_cfg.density = 4;
> + ddr3_cfg.rowaddr = 14;
> + ddr3_cfg.coladdr = 10;
> + ddr3_cfg.pagesz = 2;
> + ddr3_cfg.trcd = 1324;
> + ddr3_cfg.trcmin = 59500;
> + ddr3_cfg.trasmin = 9750;
> + ddr3_cfg.SRT = 0;
> + sysinfo.cs_density = 16;
> + sysinfo.cs1_mirror = 1;
> + sysinfo.bi_on = 1;
> + sysinfo.rtt_nom = 1;
> + sysinfo.rtt_wr = 0;
> + sysinfo.ralat = 5;
> + sysinfo.walat = 1;
> + sysinfo.mif3_mode = 3;
> + sysinfo.rst_to_cke = 0x23;
> + sysinfo.sde_to_rst = 0x10;
and here?
> + switch (dram_config) {
> + case DDR_16BIT_256MB:
> + sysinfo.dsize = 0;
> + sysinfo.ncs = 1;
> + break;
> + case DDR_32BIT_512MB:
> + sysinfo.dsize = 1;
> + sysinfo.ncs = 1;
> + break;
> + case DDR_64BIT_1GB:
> + sysinfo.dsize = 2;
> + sysinfo.ncs = 1;
> + break;
> + case DDR_64BIT_2GB:
> + sysinfo.dsize = 2;
> + sysinfo.ncs = 2;
> + break;
> + case DDR_64BIT_4GB:
> + sysinfo.dsize = 2;
> + sysinfo.ncs = 2;
> + ddr3_cfg.rowaddr = 15;
> + break;
> + default:
> + puts("Tried to setup invalid DDR configuration\n");
> + hang();
> + }
> +
> + mx6_dram_cfg(&sysinfo, &calib, &ddr3_cfg);
> + udelay(100);
> +}
> +
> +static int cm_fx6_spl_dram_init(void)
> +{
> + u32 cpurev, imxtype;
> + unsigned long bank1_size, bank2_size;
> +
> + cpurev = get_cpu_rev();
> + imxtype = (cpurev & 0xFF000) >> 12;
I would expect here at least cpu_type() usage instead of open coding.
Or may be to spare the above construct, it is worth introducing
a kind of get_cpu_type()? like:
#define get_cpu_type() (cpu_type(get_cpu_rev()))
in arch/arm/include/asm/arch-mx6/sys_proto.h
And then you can use get_imx_cpu_type() inside the switch below.
What do you think?
> +
> + switch (imxtype) {
> + case MXC_CPU_MX6SOLO:
> + spl_mx6s_dram_setup_iomux();
> +
> + spl_mx6s_dram_init(DDR_32BIT_1GB, 0);
> + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
> + if (bank1_size == 0x40000000)
> + return 0;
> +
> + if (bank1_size == 0x20000000) {
> + spl_mx6s_dram_init(DDR_32BIT_512MB, 1);
> + return 0;
> + }
> +
> + spl_mx6s_dram_init(DDR_16BIT_256MB, 1);
> + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
> + if (bank1_size == 0x10000000)
> + return 0;
> +
> + break;
> + case MXC_CPU_MX6D:
> + case MXC_CPU_MX6Q:
> + spl_mx6q_dram_setup_iomux();
> +
> + spl_mx6q_dram_init(DDR_64BIT_4GB, 0);
> + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
> + if (bank1_size == 0x80000000)
> + return 0;
> +
> + if (bank1_size == 0x40000000) {
> + bank2_size = get_ram_size((long int *)PHYS_SDRAM_2,
> + 0x80000000);
> + if (bank2_size == 0x40000000) {
> + /* Don't do a full reset here */
> + spl_mx6q_dram_init(DDR_64BIT_2GB, 0);
> + } else {
> + spl_mx6q_dram_init(DDR_64BIT_1GB, 1);
> + }
> +
> + return 0;
> + }
> +
> + spl_mx6q_dram_init(DDR_32BIT_512MB, 1);
> + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
> + if (bank1_size == 0x20000000)
> + return 0;
> +
> + spl_mx6q_dram_init(DDR_16BIT_256MB, 1);
> + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
> + if (bank1_size == 0x10000000)
> + return 0;
> +
> + break;
> + }
> +
> + return -1;
> +}
> +
> +static iomux_v3_cfg_t const uart4_pads[] = {
> + IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
> + IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
> +};
> +
> +static void cm_fx6_setup_uart(void)
> +{
> + SETUP_IOMUX_PADS(uart4_pads);
> + enable_uart_clk(1);
> +}
> +
> +#ifdef CONFIG_SPL_SPI_SUPPORT
> +static void cm_fx6_setup_ecspi(void)
> +{
> + enable_cspi_clock(1, 0);
> + cm_fx6_set_ecspi_iomux();
It does not really meter, but it will lok better if the sequence
will be the same as for uart: mux and then clock...
> +}
> +#else
> +static void cm_fx6_setup_ecspi(void) { }
> +#endif
> +
> +void board_init_f(ulong dummy)
> +{
> + gd = &gdata;
> + enable_usdhc_clk(1, 2);
can this be done inside board_mmc_init() or even in a common location
like fsl_esdhc_initialize()?
> + arch_cpu_init();
> + timer_init();
> + cm_fx6_setup_ecspi();
> + cm_fx6_setup_uart();
> + get_clocks();
> + preloader_console_init();
> + gpio_direction_output(CM_FX6_GREEN_LED, 1);
> + if (cm_fx6_spl_dram_init()) {
> + puts("!!!ERROR!!! DRAM detection failed!!!\n");
> + hang();
Hmmm... why hang? may be reset the cpu/board and try again?
> + }
> +
> + memset(__bss_start, 0, __bss_end - __bss_start);
> + board_init_r(NULL, 0);
> +}
> +
> +void spl_board_init(void)
> +{
> + uint soc_sbmr = readl(SRC_BASE_ADDR + 0x4);
> + uint bt_mem_ctl = (soc_sbmr & 0x000000FF) >> 4;
> + uint bt_mem_type = (soc_sbmr & 0x00000008) >> 3;
> +
> + if (bt_mem_ctl == 0x3 && !bt_mem_type)
> + puts("Booting from SPI flash\n");
> + else if (bt_mem_ctl == 0x4 || bt_mem_ctl == 0x5)
> + puts("Booting from MMC\n");
> + else
> + puts("Unknown boot device\n");
Can we call spl_boot_device() here instead?
> +}
> +
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> +int board_mmc_init(bd_t *bis)
> +{
> + cm_fx6_set_usdhc_iomux();
> +
> + usdhc_cfg[2].sdhc_clk = mxc_get_clock(usdhc_clk[2]);
> + usdhc_cfg[2].max_bus_width = 4;
You use only one member of that array...
It is not likely to change.
Can we just define one instance on the stack and
hardcode its initialization?
This will eliminate the need for sharing the same definition
of that array between SPL and U-Boot and thus make things simpler.
> +
> + return fsl_esdhc_initialize(bis, &usdhc_cfg[2]);
> +}
> +#endif
[...]
> diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
> new file mode 100644
> index 0000000..b877b65
> --- /dev/null
> +++ b/include/configs/cm_fx6.h
> @@ -0,0 +1,211 @@
> +/*
> + * Config file for Compulab CM-FX6 board
> + *
> + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
> + *
> + * Author: Nikita Kiryanov <nikita@compulab.co.il>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef __CONFIG_CM_FX6_H
> +#define __CONFIG_CM_FX6_H
> +
> +#include <asm/arch/imx-regs.h>
> +#include <config_distro_defaults.h>
> +
> +#define CONFIG_SYS_L2CACHE_OFF
Hmmm... Is there a problem using cache on i.MX6 currently?
[...]
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> + "kernel=uImage-cm-fx6\0" \
> + "autoload=no\0" \
> + "loadaddr=0x10800000\0" \
> + "fdtaddr=0x11000000\0" \
> + "console=ttymxc3,115200\0" \
> + "ethprime=FEC0\0" \
> + "bootscr=boot.scr\0" \
> + "bootm_low=18000000\0" \
> + "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32 at 50,if=RGB32\0" \
> + "video_dvi=mxcfb0:dev=dvi,1280x800M-32 at 50,if=RGB32\0" \
> + "fdtfile=cm-fx6.dtb\0" \
> + "doboot=bootm ${loadaddr}\0" \
> + "loadfdt=false\0" \
> + "setboottypez=setenv kernel zImage-cm-fx6;" \
> + "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
> + "setenv loadfdt true;\0" \
> + "setboottypem=setenv kernel uImage-cm-fx6;" \
> + "setenv doboot bootm ${loadaddr};" \
> + "setenv loadfdt false;\0"\
> + "run_eboot=echo Starting EBOOT ...; "\
> + "mmc dev ${mmcdev} && " \
> + "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
> + "mmcdev=2\0" \
> + "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
> + "loadmmcbootscript=fatload mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
Can we switch to use load instead of fatload?
> + "mmcbootscript=echo Running bootscript from mmc ...; "\
> + "source ${loadaddr}\0" \
> + "mmcargs=setenv bootargs console=${console} " \
> + "root=${mmcroot} " \
> + "${video}\0" \
> + "mmcloadkernel=fatload mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
> + "mmcloadfdt=fatload mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
> + "mmcboot=echo Booting from mmc ...; " \
> + "run mmcargs; " \
> + "run doboot\0" \
> + "nandroot=/dev/mtdblock4 rw\0" \
> + "nandrootfstype=ubifs\0" \
> + "nandargs=setenv bootargs console=${console} " \
> + "root=${nandroot} " \
> + "rootfstype=${nandrootfstype} " \
> + "${video}\0" \
> + "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
> + "nandboot=echo Booting from nand ...; " \
> + "run nandargs; " \
> + "nand read ${loadaddr} 0 780000; " \
> + "if ${loadfdt}; then " \
> + "run nandloadfdt;" \
> + "fi; " \
> + "run doboot\0" \
> + "boot=mmc dev ${mmcdev}; " \
> + "if mmc rescan; then " \
> + "if run loadmmcbootscript; then " \
> + "run mmcbootscript;" \
> + "else " \
> + "if run mmcloadkernel; then " \
> + "if ${loadfdt}; then " \
> + "run mmcloadfdt;" \
> + "fi;" \
> + "run mmcboot;" \
> + "fi;" \
> + "fi;" \
> + "fi;"
> +
> +#define CONFIG_BOOTCOMMAND \
> + "run setboottypem; run boot"
> +
[...]
> +
> +/* Boot */
> +#define CONFIG_ZERO_BOOTDELAY_CHECK
> +#define CONFIG_LOADADDR 0x10800000
> +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
> +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
> +#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_INITRD_TAG
CONFIG_REVISION_TAG ?
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V3 12/18] arm: mx6: add support for Compulab cm-fx6 CoM
2014-08-13 12:55 ` Igor Grinberg
@ 2014-08-14 7:16 ` Igor Grinberg
2014-08-19 15:19 ` Nikita Kiryanov
2014-08-19 15:17 ` Nikita Kiryanov
2014-08-20 11:23 ` Nikita Kiryanov
2 siblings, 1 reply; 34+ messages in thread
From: Igor Grinberg @ 2014-08-14 7:16 UTC (permalink / raw)
To: u-boot
On 08/13/14 15:55, Igor Grinberg wrote:
> Hi Nikita,
>
> Several comments below in addition to Simon's.
>
> On 08/11/14 19:22, Nikita Kiryanov wrote:
>> Add initial support for Compulab CM-FX6 CoM.
>> Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.
>>
>> Cc: Igor Grinberg <grinberg@compulab.co.il>
>> Cc: Stefano Babic <sbabic@denx.de>
>> Cc: Tom Rini <trini@ti.com>
>> Cc: Marek Vasut <marex@denx.de>
>> Acked-by: Marek Vasut <marex@denx.de>
>> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
>> ---
[...]
>> +#define CONFIG_EXTRA_ENV_SETTINGS \
>> + "kernel=uImage-cm-fx6\0" \
>> + "autoload=no\0" \
>> + "loadaddr=0x10800000\0" \
>> + "fdtaddr=0x11000000\0" \
>> + "console=ttymxc3,115200\0" \
>> + "ethprime=FEC0\0" \
>> + "bootscr=boot.scr\0" \
>> + "bootm_low=18000000\0" \
>> + "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32 at 50,if=RGB32\0" \
>> + "video_dvi=mxcfb0:dev=dvi,1280x800M-32 at 50,if=RGB32\0" \
>> + "fdtfile=cm-fx6.dtb\0" \
>> + "doboot=bootm ${loadaddr}\0" \
>> + "loadfdt=false\0" \
>> + "setboottypez=setenv kernel zImage-cm-fx6;" \
>> + "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
>> + "setenv loadfdt true;\0" \
>> + "setboottypem=setenv kernel uImage-cm-fx6;" \
>> + "setenv doboot bootm ${loadaddr};" \
>> + "setenv loadfdt false;\0"\
>> + "run_eboot=echo Starting EBOOT ...; "\
>> + "mmc dev ${mmcdev} && " \
>> + "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
>> + "mmcdev=2\0" \
>> + "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
>> + "loadmmcbootscript=fatload mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
>
> Can we switch to use load instead of fatload?
>
>> + "mmcbootscript=echo Running bootscript from mmc ...; "\
>> + "source ${loadaddr}\0" \
>> + "mmcargs=setenv bootargs console=${console} " \
>> + "root=${mmcroot} " \
>> + "${video}\0" \
>> + "mmcloadkernel=fatload mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
>> + "mmcloadfdt=fatload mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
>> + "mmcboot=echo Booting from mmc ...; " \
>> + "run mmcargs; " \
>> + "run doboot\0" \
>> + "nandroot=/dev/mtdblock4 rw\0" \
>> + "nandrootfstype=ubifs\0" \
>> + "nandargs=setenv bootargs console=${console} " \
>> + "root=${nandroot} " \
>> + "rootfstype=${nandrootfstype} " \
>> + "${video}\0" \
>> + "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
>> + "nandboot=echo Booting from nand ...; " \
>> + "run nandargs; " \
>> + "nand read ${loadaddr} 0 780000; " \
>> + "if ${loadfdt}; then " \
>> + "run nandloadfdt;" \
>> + "fi; " \
>> + "run doboot\0" \
I think, if we add NAND support in a separate patch, then probably
it will be better also to add nand boot related environment stuff
along with the NAND support.
>> + "boot=mmc dev ${mmcdev}; " \
>> + "if mmc rescan; then " \
>> + "if run loadmmcbootscript; then " \
>> + "run mmcbootscript;" \
>> + "else " \
>> + "if run mmcloadkernel; then " \
>> + "if ${loadfdt}; then " \
>> + "run mmcloadfdt;" \
>> + "fi;" \
>> + "run mmcboot;" \
>> + "fi;" \
>> + "fi;" \
>> + "fi;"
Also, you add NAND boot commands neither here, nor in the NAND
support patch. Can we have them too? Please?
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V3 12/18] arm: mx6: add support for Compulab cm-fx6 CoM
2014-08-14 7:16 ` Igor Grinberg
@ 2014-08-19 15:19 ` Nikita Kiryanov
0 siblings, 0 replies; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-19 15:19 UTC (permalink / raw)
To: u-boot
Hi Igor,
On 14/08/14 10:16, Igor Grinberg wrote:
> On 08/13/14 15:55, Igor Grinberg wrote:
>> Hi Nikita,
>>
>> Several comments below in addition to Simon's.
>>
>> On 08/11/14 19:22, Nikita Kiryanov wrote:
>>> Add initial support for Compulab CM-FX6 CoM.
>>> Support includes MMC, SPI flash, and SPL with dynamic DRAM detection.
>>>
>>> Cc: Igor Grinberg <grinberg@compulab.co.il>
>>> Cc: Stefano Babic <sbabic@denx.de>
>>> Cc: Tom Rini <trini@ti.com>
>>> Cc: Marek Vasut <marex@denx.de>
>>> Acked-by: Marek Vasut <marex@denx.de>
>>> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
>>> ---
>
> [...]
>
>>> +#define CONFIG_EXTRA_ENV_SETTINGS \
>>> + "kernel=uImage-cm-fx6\0" \
>>> + "autoload=no\0" \
>>> + "loadaddr=0x10800000\0" \
>>> + "fdtaddr=0x11000000\0" \
>>> + "console=ttymxc3,115200\0" \
>>> + "ethprime=FEC0\0" \
>>> + "bootscr=boot.scr\0" \
>>> + "bootm_low=18000000\0" \
>>> + "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32 at 50,if=RGB32\0" \
>>> + "video_dvi=mxcfb0:dev=dvi,1280x800M-32 at 50,if=RGB32\0" \
>>> + "fdtfile=cm-fx6.dtb\0" \
>>> + "doboot=bootm ${loadaddr}\0" \
>>> + "loadfdt=false\0" \
>>> + "setboottypez=setenv kernel zImage-cm-fx6;" \
>>> + "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
>>> + "setenv loadfdt true;\0" \
>>> + "setboottypem=setenv kernel uImage-cm-fx6;" \
>>> + "setenv doboot bootm ${loadaddr};" \
>>> + "setenv loadfdt false;\0"\
>>> + "run_eboot=echo Starting EBOOT ...; "\
>>> + "mmc dev ${mmcdev} && " \
>>> + "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
>>> + "mmcdev=2\0" \
>>> + "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
>>> + "loadmmcbootscript=fatload mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
>>
>> Can we switch to use load instead of fatload?
Yes
>>
>>> + "mmcbootscript=echo Running bootscript from mmc ...; "\
>>> + "source ${loadaddr}\0" \
>>> + "mmcargs=setenv bootargs console=${console} " \
>>> + "root=${mmcroot} " \
>>> + "${video}\0" \
>>> + "mmcloadkernel=fatload mmc ${mmcdev} ${loadaddr} ${kernel}\0" \
>>> + "mmcloadfdt=fatload mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \
>>> + "mmcboot=echo Booting from mmc ...; " \
>>> + "run mmcargs; " \
>>> + "run doboot\0" \
>>> + "nandroot=/dev/mtdblock4 rw\0" \
>>> + "nandrootfstype=ubifs\0" \
>>> + "nandargs=setenv bootargs console=${console} " \
>>> + "root=${nandroot} " \
>>> + "rootfstype=${nandrootfstype} " \
>>> + "${video}\0" \
>>> + "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \
>>> + "nandboot=echo Booting from nand ...; " \
>>> + "run nandargs; " \
>>> + "nand read ${loadaddr} 0 780000; " \
>>> + "if ${loadfdt}; then " \
>>> + "run nandloadfdt;" \
>>> + "fi; " \
>>> + "run doboot\0" \
>
> I think, if we add NAND support in a separate patch, then probably
> it will be better also to add nand boot related environment stuff
> along with the NAND support.
You're right, I'll move this to the nand patch
>
>>> + "boot=mmc dev ${mmcdev}; " \
>>> + "if mmc rescan; then " \
>>> + "if run loadmmcbootscript; then " \
>>> + "run mmcbootscript;" \
>>> + "else " \
>>> + "if run mmcloadkernel; then " \
>>> + "if ${loadfdt}; then " \
>>> + "run mmcloadfdt;" \
>>> + "fi;" \
>>> + "run mmcboot;" \
>>> + "fi;" \
>>> + "fi;" \
>>> + "fi;"
>
> Also, you add NAND boot commands neither here, nor in the NAND
> support patch. Can we have them too? Please?
Sure, in the nand patch
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V3 12/18] arm: mx6: add support for Compulab cm-fx6 CoM
2014-08-13 12:55 ` Igor Grinberg
2014-08-14 7:16 ` Igor Grinberg
@ 2014-08-19 15:17 ` Nikita Kiryanov
2014-08-20 11:23 ` Nikita Kiryanov
2 siblings, 0 replies; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-19 15:17 UTC (permalink / raw)
To: u-boot
Hi Igor,
On 13/08/14 15:55, Igor Grinberg wrote:
>> +#ifdef CONFIG_FSL_ESDHC
>> +int board_mmc_init(bd_t *bis)
>> +{
>> + int i;
>> +
>> + cm_fx6_set_usdhc_iomux();
>> + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
>> + usdhc_cfg[i].sdhc_clk = mxc_get_clock(usdhc_clk[i]);
>> + usdhc_cfg[i].max_bus_width = 4;
>> + fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
>> + enable_usdhc_clk(1, i);
>
> Why does the board code needs to handle the mmc clocks?
> Can't this be handled in the common code?
It (probably) can, but it currently isn't. If we were to change this
I would prefer it to be done outside of this patch series.
>
>> + }
>> +
>> + return 0;
>> +}
>> +#endif
>> +
>> +int board_init(void)
>> +{
>> + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
>> + return 0;
>> +}
>> +
>> +int checkboard(void)
>> +{
>> + puts("Board: CM-FX6\n");
>> + return 0;
>> +}
>> +
>> +static ulong bank1_size;
>> +static ulong bank2_size;
>> +
>> +void dram_init_banksize(void)
>> +{
>> + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
>> + gd->bd->bi_dram[0].size = bank1_size;
>> + gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
>> + gd->bd->bi_dram[1].size = bank2_size;
>> +}
>> +
>> +int dram_init(void)
>> +{
>> + gd->ram_size = imx_ddr_size();
>> + switch (gd->ram_size) {
>> + case 0x10000000: /* DDR_16BIT_256MB */
>> + bank1_size = 0x10000000;
>> + bank2_size = 0;
>> + break;
>> + case 0x20000000: /* DDR_32BIT_512MB */
>> + bank1_size = 0x20000000;
>> + bank2_size = 0;
>> + break;
>> + case 0x40000000:
>> + if (is_cpu_type(MXC_CPU_MX6SOLO)) { /* DDR_32BIT_1GB */
>> + bank1_size = 0x20000000;
>> + bank2_size = 0x20000000;
>> + } else { /* DDR_64BIT_1GB */
>> + bank1_size = 0x40000000;
>> + bank2_size = 0;
>
> You don't need to init bank2_size to zero in all above cases.
Actually, I'm going to refactor and eliminate these variables, because
I see that bss is not yet ready at this stage in the boot.
>
>> + }
>> + break;
>> + case 0x80000000: /* DDR_64BIT_2GB */
>> + bank1_size = 0x40000000;
>> + bank2_size = 0x40000000;
>> + break;
>> + case 0xF0000000: /* DDR_64BIT_4GB */
>> + bank1_size = 0x70000000;
>> + bank2_size = 0x7FF00000;
>> + gd->ram_size -= 0x100000;
>> + break;
>> + default:
>> + printf("ERROR: Unsupported DRAM size 0x%lx\n", gd->ram_size);
>> + return -1;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +u32 get_board_rev(void)
>> +{
>> + return 100;
>
> Hmmm... cl_eeprom_get_board_rev()?
There's no I2C support in this patch.
I'll remove this function and reintroduce it later per your suggestion
in a different patch.
>> +static __maybe_unused enum mxc_clock usdhc_clk[3] = {
>> + MXC_ESDHC_CLK,
>> + MXC_ESDHC2_CLK,
>> + MXC_ESDHC3_CLK,
>> +};
>
> Why do you need the above structures defined here in .h file?
> Can they live in .c file that is using them?
> I think cm_fx6.c is the appropriate place for these.
I'll move them to cm_fx6.c. The code reuse was minimal anyway..
>> +static void spl_mx6s_dram_setup_iomux(void)
>> +{
>> + struct mx6sdl_iomux_ddr_regs ddr_iomux;
>> + struct mx6sdl_iomux_grp_regs grp_iomux;
>> +
>> + ddr_iomux.dram_sdqs0 = 0x00000038;
>> + ddr_iomux.dram_sdqs1 = 0x00000038;
>> + ddr_iomux.dram_sdqs2 = 0x00000038;
>> + ddr_iomux.dram_sdqs3 = 0x00000038;
>> + ddr_iomux.dram_sdqs4 = 0x00000038;
>> + ddr_iomux.dram_sdqs5 = 0x00000038;
>> + ddr_iomux.dram_sdqs6 = 0x00000038;
>> + ddr_iomux.dram_sdqs7 = 0x00000038;
>> + ddr_iomux.dram_dqm0 = 0x00000038;
>> + ddr_iomux.dram_dqm1 = 0x00000038;
>> + ddr_iomux.dram_dqm2 = 0x00000038;
>> + ddr_iomux.dram_dqm3 = 0x00000038;
>> + ddr_iomux.dram_dqm4 = 0x00000038;
>> + ddr_iomux.dram_dqm5 = 0x00000038;
>> + ddr_iomux.dram_dqm6 = 0x00000038;
>> + ddr_iomux.dram_dqm7 = 0x00000038;
>> + ddr_iomux.dram_cas = 0x00000038;
>> + ddr_iomux.dram_ras = 0x00000038;
>> + ddr_iomux.dram_sdclk_0 = 0x00000038;
>> + ddr_iomux.dram_sdclk_1 = 0x00000038;
>> + ddr_iomux.dram_sdcke0 = 0x00003000;
>> + ddr_iomux.dram_sdcke1 = 0x00003000;
>> + /*
>> + * Below DRAM_RESET[DDR_SEL] = 0 which is incorrect according to
>> + * Freescale QRM, but this is exactly the value used by the automatic
>> + * calibration script and it works also in all our tests, so we leave
>> + * it as is at this point.
>> + */
>> + ddr_iomux.dram_reset = 0x00000038;
>> + ddr_iomux.dram_sdba2 = 0x00000000;
>> + ddr_iomux.dram_sdodt0 = 0x00000038;
>> + ddr_iomux.dram_sdodt1 = 0x00000038;
>> + grp_iomux.grp_b0ds = 0x00000038;
>> + grp_iomux.grp_b1ds = 0x00000038;
>> + grp_iomux.grp_b2ds = 0x00000038;
>> + grp_iomux.grp_b3ds = 0x00000038;
>> + grp_iomux.grp_b4ds = 0x00000038;
>> + grp_iomux.grp_b5ds = 0x00000038;
>> + grp_iomux.grp_b6ds = 0x00000038;
>> + grp_iomux.grp_b7ds = 0x00000038;
>> + grp_iomux.grp_addds = 0x00000038;
>> + grp_iomux.grp_ddrmode_ctl = 0x00020000;
>> + grp_iomux.grp_ddrpke = 0x00000000;
>> + grp_iomux.grp_ddrmode = 0x00020000;
>> + grp_iomux.grp_ctlds = 0x00000038;
>> + grp_iomux.grp_ddr_type = 0x000C0000;
>
> Hmmm... Can we do the above initializations statically?
Yes.
> I mean, define the structures outside of the function and initialize
> them statically, and then only pass the structures to the below
> function. Moreover, this way, you will not need this function at all,
> but call the below from cm_fx6_spl_dram_init().
Will do (here and below)..
>
>> + mx6sdl_dram_iocfg(64, &ddr_iomux, &grp_iomux);
>> +}
>> +
>> +static void spl_mx6q_dram_setup_iomux(void)
>> +{
>> + struct mx6dq_iomux_ddr_regs ddr_iomux;
>> + struct mx6dq_iomux_grp_regs grp_iomux;
>> +
[..]
>> + mx6dq_dram_iocfg(64, &ddr_iomux, &grp_iomux);
>> +}
>> +
>> +static void spl_mx6s_dram_init(enum ddr_config dram_config, int reset)
>
> I think we have bool type in U-Boot, right?
> If so, it would be more descriptive to have bool reset.
OK
>
>> +{
>> + struct mx6_mmdc_calibration calib;
>> + struct mx6_ddr_sysinfo sysinfo;
>> + struct mx6_ddr3_cfg ddr3_cfg;
>> +
>> + if (reset)
>> + ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2;
>> +
>> + calib.p0_mpwldectrl0 = 0x005B0061;
>> + calib.p0_mpwldectrl1 = 0x004F0055;
[..]
>> +
>> +static int cm_fx6_spl_dram_init(void)
>> +{
>> + u32 cpurev, imxtype;
>> + unsigned long bank1_size, bank2_size;
>> +
>> + cpurev = get_cpu_rev();
>> + imxtype = (cpurev & 0xFF000) >> 12;
>
> I would expect here at least cpu_type() usage instead of open coding.
> Or may be to spare the above construct, it is worth introducing
> a kind of get_cpu_type()? like:
>
> #define get_cpu_type() (cpu_type(get_cpu_rev()))
>
> in arch/arm/include/asm/arch-mx6/sys_proto.h
> And then you can use get_imx_cpu_type() inside the switch below.
> What do you think?
Good idea. Will add it.
>
>> +
>> + switch (imxtype) {
>> + case MXC_CPU_MX6SOLO:
>> + spl_mx6s_dram_setup_iomux();
>> +
>> + spl_mx6s_dram_init(DDR_32BIT_1GB, 0);
>> + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
>> + if (bank1_size == 0x40000000)
>> + return 0;
>> +
>> + if (bank1_size == 0x20000000) {
>> + spl_mx6s_dram_init(DDR_32BIT_512MB, 1);
>> + return 0;
>> + }
>> +
>> + spl_mx6s_dram_init(DDR_16BIT_256MB, 1);
>> + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
>> + if (bank1_size == 0x10000000)
>> + return 0;
>> +
>> + break;
>> + case MXC_CPU_MX6D:
>> + case MXC_CPU_MX6Q:
>> + spl_mx6q_dram_setup_iomux();
>> +
>> + spl_mx6q_dram_init(DDR_64BIT_4GB, 0);
>> + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
>> + if (bank1_size == 0x80000000)
>> + return 0;
>> +
>> + if (bank1_size == 0x40000000) {
>> + bank2_size = get_ram_size((long int *)PHYS_SDRAM_2,
>> + 0x80000000);
>> + if (bank2_size == 0x40000000) {
>> + /* Don't do a full reset here */
>> + spl_mx6q_dram_init(DDR_64BIT_2GB, 0);
>> + } else {
>> + spl_mx6q_dram_init(DDR_64BIT_1GB, 1);
>> + }
>> +
>> + return 0;
>> + }
>> +
>> + spl_mx6q_dram_init(DDR_32BIT_512MB, 1);
>> + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
>> + if (bank1_size == 0x20000000)
>> + return 0;
>> +
>> + spl_mx6q_dram_init(DDR_16BIT_256MB, 1);
>> + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000);
>> + if (bank1_size == 0x10000000)
>> + return 0;
>> +
>> + break;
>> + }
>> +
>> + return -1;
>> +}
>> +
>> +static iomux_v3_cfg_t const uart4_pads[] = {
>> + IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
>> + IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
>> +};
>> +
>> +static void cm_fx6_setup_uart(void)
>> +{
>> + SETUP_IOMUX_PADS(uart4_pads);
>> + enable_uart_clk(1);
>> +}
>> +
>> +#ifdef CONFIG_SPL_SPI_SUPPORT
>> +static void cm_fx6_setup_ecspi(void)
>> +{
>> + enable_cspi_clock(1, 0);
>> + cm_fx6_set_ecspi_iomux();
>
> It does not really meter, but it will lok better if the sequence
> will be the same as for uart: mux and then clock...
Can do..
>
>> +}
>> +#else
>> +static void cm_fx6_setup_ecspi(void) { }
>> +#endif
>> +
>> +void board_init_f(ulong dummy)
>> +{
>> + gd = &gdata;
>> + enable_usdhc_clk(1, 2);
>
> can this be done inside board_mmc_init() or even in a common location
> like fsl_esdhc_initialize()?
>
>> + arch_cpu_init();
>> + timer_init();
>> + cm_fx6_setup_ecspi();
>> + cm_fx6_setup_uart();
>> + get_clocks();
>> + preloader_console_init();
>> + gpio_direction_output(CM_FX6_GREEN_LED, 1);
>> + if (cm_fx6_spl_dram_init()) {
>> + puts("!!!ERROR!!! DRAM detection failed!!!\n");
>> + hang();
>
> Hmmm... why hang? may be reset the cpu/board and try again?
I prefer the hang because it seems safer to me; better to not
boot than boot with bad RAM.
>
>> + }
>> +
>> + memset(__bss_start, 0, __bss_end - __bss_start);
>> + board_init_r(NULL, 0);
>> +}
>> +
>> +void spl_board_init(void)
>> +{
>> + uint soc_sbmr = readl(SRC_BASE_ADDR + 0x4);
>> + uint bt_mem_ctl = (soc_sbmr & 0x000000FF) >> 4;
>> + uint bt_mem_type = (soc_sbmr & 0x00000008) >> 3;
>> +
>> + if (bt_mem_ctl == 0x3 && !bt_mem_type)
>> + puts("Booting from SPI flash\n");
>> + else if (bt_mem_ctl == 0x4 || bt_mem_ctl == 0x5)
>> + puts("Booting from MMC\n");
>> + else
>> + puts("Unknown boot device\n");
>
> Can we call spl_boot_device() here instead?
Sure
>
>> +}
>> +
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> +int board_mmc_init(bd_t *bis)
>> +{
>> + cm_fx6_set_usdhc_iomux();
>> +
>> + usdhc_cfg[2].sdhc_clk = mxc_get_clock(usdhc_clk[2]);
>> + usdhc_cfg[2].max_bus_width = 4;
>
> You use only one member of that array...
> It is not likely to change.
> Can we just define one instance on the stack and
> hardcode its initialization?
> This will eliminate the need for sharing the same definition
> of that array between SPL and U-Boot and thus make things simpler.
Agreed.
>> diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
>> new file mode 100644
>> index 0000000..b877b65
>> --- /dev/null
>> +++ b/include/configs/cm_fx6.h
>> @@ -0,0 +1,211 @@
>> +/*
>> + * Config file for Compulab CM-FX6 board
>> + *
>> + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
>> + *
>> + * Author: Nikita Kiryanov <nikita@compulab.co.il>
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#ifndef __CONFIG_CM_FX6_H
>> +#define __CONFIG_CM_FX6_H
>> +
>> +#include <asm/arch/imx-regs.h>
>> +#include <config_distro_defaults.h>
>> +
>> +#define CONFIG_SYS_L2CACHE_OFF
>
> Hmmm... Is there a problem using cache on i.MX6 currently?
>
This define can be removed.
>
>> +#define CONFIG_EXTRA_ENV_SETTINGS \
>> + "kernel=uImage-cm-fx6\0" \
>> + "autoload=no\0" \
>> + "loadaddr=0x10800000\0" \
>> + "fdtaddr=0x11000000\0" \
>> + "console=ttymxc3,115200\0" \
>> + "ethprime=FEC0\0" \
>> + "bootscr=boot.scr\0" \
>> + "bootm_low=18000000\0" \
>> + "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32 at 50,if=RGB32\0" \
>> + "video_dvi=mxcfb0:dev=dvi,1280x800M-32 at 50,if=RGB32\0" \
>> + "fdtfile=cm-fx6.dtb\0" \
>> + "doboot=bootm ${loadaddr}\0" \
>> + "loadfdt=false\0" \
>> + "setboottypez=setenv kernel zImage-cm-fx6;" \
>> + "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \
>> + "setenv loadfdt true;\0" \
>> + "setboottypem=setenv kernel uImage-cm-fx6;" \
>> + "setenv doboot bootm ${loadaddr};" \
>> + "setenv loadfdt false;\0"\
>> + "run_eboot=echo Starting EBOOT ...; "\
>> + "mmc dev ${mmcdev} && " \
>> + "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \
>> + "mmcdev=2\0" \
>> + "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
>> + "loadmmcbootscript=fatload mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \
>
> Can we switch to use load instead of fatload?
>
Yes
^ permalink raw reply [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V3 12/18] arm: mx6: add support for Compulab cm-fx6 CoM
2014-08-13 12:55 ` Igor Grinberg
2014-08-14 7:16 ` Igor Grinberg
2014-08-19 15:17 ` Nikita Kiryanov
@ 2014-08-20 11:23 ` Nikita Kiryanov
2 siblings, 0 replies; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-20 11:23 UTC (permalink / raw)
To: u-boot
Forgot to answer this part:
On 13/08/14 15:55, Igor Grinberg wrote:
> Hi Nikita,
[...]
>> +}
>> +#else
>> +static void cm_fx6_setup_ecspi(void) { }
>> +#endif
>> +
>> +void board_init_f(ulong dummy)
>> +{
>> + gd = &gdata;
>> + enable_usdhc_clk(1, 2);
>
> can this be done inside board_mmc_init() or even in a common location
> like fsl_esdhc_initialize()?
This is actually here for DMA, not MMC. usdhc3_clk_root is a clock
source for APBH DMA, and I have to make sure it is activated or else
DMA init will hang when booting from SPI flash (when booting from MMC,
the boot rom takes care of turning this clock on).
I'll move it to the NAND patch.
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V2 13/18] arm: mx6: cm_fx6: add nand support
2014-08-10 17:12 [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Nikita Kiryanov
` (2 preceding siblings ...)
2014-08-10 17:12 ` [U-Boot] [PATCH V2 12/18] arm: mx6: add support for Compulab cm-fx6 CoM Nikita Kiryanov
@ 2014-08-10 17:12 ` Nikita Kiryanov
2014-08-13 14:29 ` Igor Grinberg
2014-08-10 17:12 ` [U-Boot] [PATCH V2 14/18] arm: mx6: cm_fx6: add ethernet support Nikita Kiryanov
` (5 subsequent siblings)
9 siblings, 1 reply; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-10 17:12 UTC (permalink / raw)
To: u-boot
Add NAND support for Compulab CM-FX6 CoM.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V2:
- No changes
board/compulab/cm_fx6/cm_fx6.c | 37 +++++++++++++++++++++++++++++++++++++
board/compulab/cm_fx6/spl.c | 9 +++++++++
include/configs/cm_fx6.h | 14 ++++++++++++++
3 files changed, 60 insertions(+)
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index 47d17bb..ac7940b 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -9,11 +9,46 @@
*/
#include <common.h>
+#include <asm/arch/crm_regs.h>
#include <asm/arch/sys_proto.h>
+#include <asm/io.h>
#include "common.h"
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_NAND_MXS
+static iomux_v3_cfg_t const nand_pads[] = {
+ IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(NO_PAD_CTRL)),
+};
+
+static void cm_fx6_setup_gpmi_nand(void)
+{
+ SETUP_IOMUX_PADS(nand_pads);
+ /* Enable clock roots */
+ enable_usdhc_clk(1, 3);
+ enable_usdhc_clk(1, 4);
+
+ setup_gpmi_io_clk(MXC_CCM_CS2CDR_ENFC_CLK_PODF(0xf) |
+ MXC_CCM_CS2CDR_ENFC_CLK_PRED(1) |
+ MXC_CCM_CS2CDR_ENFC_CLK_SEL(0));
+}
+#else
+static void cm_fx6_setup_gpmi_nand(void) {}
+#endif
+
#ifdef CONFIG_FSL_ESDHC
int board_mmc_init(bd_t *bis)
{
@@ -34,6 +69,8 @@ int board_mmc_init(bd_t *bis)
int board_init(void)
{
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+ cm_fx6_setup_gpmi_nand();
+
return 0;
}
diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c
index 9f9e5f8..5c432b4 100644
--- a/board/compulab/cm_fx6/spl.c
+++ b/board/compulab/cm_fx6/spl.c
@@ -15,6 +15,7 @@
#include <asm/arch/mx6-ddr.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
+#include <asm/arch/crm_regs.h>
#include <asm/imx-common/iomux-v3.h>
#include <fsl_esdhc.h>
#include "common.h"
@@ -355,7 +356,15 @@ static void cm_fx6_setup_ecspi(void) { }
void board_init_f(ulong dummy)
{
+ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
gd = &gdata;
+ /*
+ * We don't use DMA in SPL, but we do need it in U-Boot. U-Boot
+ * initializes DMA very early (before all board code), so the only
+ * opportunity we have to initialize APBHDMA clocks is in SPL.
+ */
+ setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
enable_usdhc_clk(1, 2);
arch_cpu_init();
timer_init();
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index fa88898..345d715 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -178,6 +178,20 @@
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SPI_FLASH_WINBOND
+/* NAND */
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_CMD_NAND
+#define CONFIG_SYS_NAND_BASE 0x40000000
+#define CONFIG_SYS_NAND_MAX_CHIPS 1
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_NAND_MXS
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+/* APBH DMA is required for NAND support */
+#define CONFIG_APBH_DMA
+#define CONFIG_APBH_DMA_BURST
+#define CONFIG_APBH_DMA_BURST8
+#endif
+
/* GPIO */
#define CONFIG_MXC_GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 14/18] arm: mx6: cm_fx6: add ethernet support
2014-08-10 17:12 [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Nikita Kiryanov
` (3 preceding siblings ...)
2014-08-10 17:12 ` [U-Boot] [PATCH V2 13/18] arm: mx6: cm_fx6: add nand support Nikita Kiryanov
@ 2014-08-10 17:12 ` Nikita Kiryanov
2014-08-13 13:53 ` Igor Grinberg
2014-08-10 17:12 ` [U-Boot] [PATCH V2 15/18] arm: mx6: cm_fx6: add usb support Nikita Kiryanov
` (4 subsequent siblings)
9 siblings, 1 reply; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-10 17:12 UTC (permalink / raw)
To: u-boot
Add ethernet support for Compulab CM-FX6 CoM
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V2:
- No changes
board/compulab/cm_fx6/cm_fx6.c | 100 +++++++++++++++++++++++++++++++++++++++++
board/compulab/cm_fx6/common.h | 1 +
include/configs/cm_fx6.h | 16 ++++++-
3 files changed, 115 insertions(+), 2 deletions(-)
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index ac7940b..e993de2 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -9,13 +9,100 @@
*/
#include <common.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <fdt_support.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
+#include <asm/gpio.h>
#include "common.h"
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_FEC_MXC
+#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+
+static int mx6_rgmii_rework(struct phy_device *phydev)
+{
+ unsigned short val;
+
+ /* Ar8031 phy SmartEEE feature cause link status generates glitch,
+ * which cause ethernet link down/up issue, so disable SmartEEE
+ */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x3);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003);
+ val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
+ val &= ~(0x1 << 8);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
+
+ /* To enable AR8031 ouput a 125MHz clk from CLK_25M */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
+
+ val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
+ val &= 0xffe3;
+ val |= 0x18;
+ phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
+
+ /* introduce tx clock delay */
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
+ val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
+ val |= 0x0100;
+ phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
+
+ return 0;
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+ mx6_rgmii_rework(phydev);
+
+ if (phydev->drv->config)
+ return phydev->drv->config(phydev);
+
+ return 0;
+}
+
+static iomux_v3_cfg_t const enet_pads[] = {
+ IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_GPIO_0__CCM_CLKO1 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_GPIO_3__CCM_CLKO2 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(0x84)),
+ IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK |
+ MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL |
+ MUX_PAD_CTRL(ENET_PAD_CTRL)),
+ IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL |
+ MUX_PAD_CTRL(ENET_PAD_CTRL)),
+};
+
+int board_eth_init(bd_t *bis)
+{
+ SETUP_IOMUX_PADS(enet_pads);
+ /* phy reset */
+ gpio_direction_output(CM_FX6_ENET_NRST, 0);
+ udelay(500);
+ gpio_set_value(CM_FX6_ENET_NRST, 1);
+ enable_enet_clk(1);
+ return cpu_eth_init(bis);
+}
+#endif
+
#ifdef CONFIG_NAND_MXS
static iomux_v3_cfg_t const nand_pads[] = {
IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL)),
@@ -66,6 +153,19 @@ int board_mmc_init(bd_t *bis)
}
#endif
+#ifdef CONFIG_OF_BOARD_SETUP
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ uint8_t enetaddr[6];
+
+ /* MAC addr */
+ if (eth_getenv_enetaddr("ethaddr", enetaddr)) {
+ fdt_find_and_setprop(blob, "/fec", "local-mac-address",
+ enetaddr, 6, 1);
+ }
+}
+#endif
+
int board_init(void)
{
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h
index 05eab34..94ff39e 100644
--- a/board/compulab/cm_fx6/common.h
+++ b/board/compulab/cm_fx6/common.h
@@ -15,6 +15,7 @@
#define CM_FX6_ECSPI_BUS0_CS0 IMX_GPIO_NR(2, 30)
#define CM_FX6_GREEN_LED IMX_GPIO_NR(2, 31)
+#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8)
#if defined(CONFIG_FSL_ESDHC)
#include <fsl_esdhc.h>
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 345d715..dbe8a19 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -39,8 +39,6 @@
#undef CONFIG_CMD_XIMG
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMLS
-#undef CONFIG_CMD_NET
-#undef CONFIG_CMD_NFS
/* MMC */
#define CONFIG_MMC
@@ -192,6 +190,19 @@
#define CONFIG_APBH_DMA_BURST8
#endif
+/* Ethernet */
+#define CONFIG_FEC_MXC
+#define CONFIG_FEC_MXC_PHYADDR 0
+#define CONFIG_FEC_XCV_TYPE RGMII
+#define IMX_FEC_BASE ENET_BASE_ADDR
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_ATHEROS
+#define CONFIG_MII
+#define CONFIG_ETHPRIME "FEC0"
+#define CONFIG_ARP_TIMEOUT 200UL
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_NET_RETRY_COUNT 5
+
/* GPIO */
#define CONFIG_MXC_GPIO
@@ -210,6 +221,7 @@
#define CONFIG_STACKSIZE (128 * 1024)
#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */
+#define CONFIG_OF_BOARD_SETUP
/* SPL */
#define CONFIG_SPL
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 15/18] arm: mx6: cm_fx6: add usb support
2014-08-10 17:12 [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Nikita Kiryanov
` (4 preceding siblings ...)
2014-08-10 17:12 ` [U-Boot] [PATCH V2 14/18] arm: mx6: cm_fx6: add ethernet support Nikita Kiryanov
@ 2014-08-10 17:12 ` Nikita Kiryanov
2014-08-13 14:04 ` Igor Grinberg
2014-08-10 17:12 ` [U-Boot] [PATCH V2 16/18] arm: mx6: cm_fx6: add i2c support Nikita Kiryanov
` (3 subsequent siblings)
9 siblings, 1 reply; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-10 17:12 UTC (permalink / raw)
To: u-boot
Add USB and USB OTG host support for Compulab CM-FX6 CoM.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V2:
- No changes
board/compulab/cm_fx6/cm_fx6.c | 75 ++++++++++++++++++++++++++++++++++++++++++
board/compulab/cm_fx6/common.h | 3 ++
include/configs/cm_fx6.h | 10 ++++++
3 files changed, 88 insertions(+)
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index e993de2..28c54b4 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -14,12 +14,87 @@
#include <fdt_support.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/sys_proto.h>
+#include <asm/arch/iomux.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include "common.h"
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_USB_EHCI_MX6
+#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_HYS | PAD_CTL_SRE_SLOW)
+
+static int cm_fx6_usb_hub_reset(void)
+{
+ int err;
+
+ err = gpio_request(CM_FX6_USB_HUB_RST, "usb hub rst");
+ if (err) {
+ printf("USB hub rst gpio request failed: %d\n", err);
+ return -1;
+ }
+
+ SETUP_IOMUX_PAD(PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL));
+ gpio_direction_output(CM_FX6_USB_HUB_RST, 0);
+ udelay(10);
+ gpio_direction_output(CM_FX6_USB_HUB_RST, 1);
+ mdelay(1);
+
+ return 0;
+}
+
+static void cm_fx6_init_usb_otg(void)
+{
+ int ret;
+ struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+ ret = gpio_request(SB_FX6_USB_OTG_PWR, "usb-pwr");
+ if (ret)
+ printf("USB OTG pwr gpio request failed: %d\n", ret);
+
+ SETUP_IOMUX_PAD(PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL));
+ SETUP_IOMUX_PAD(PAD_ENET_RX_ER__USB_OTG_ID |
+ MUX_PAD_CTRL(WEAK_PULLDOWN));
+ clrbits_le32(&iomux->gpr[1], IOMUXC_GPR1_OTG_ID_MASK);
+ /* disable ext. charger detect, or it'll affect signal quality at dp. */
+ gpio_direction_output(SB_FX6_USB_OTG_PWR, 0);
+}
+
+#define MX6_USBNC_BASEADDR 0x2184800
+#define USBNC_USB_H1_PWR_POL (1 << 9)
+int board_ehci_hcd_init(int port)
+{
+ u32 *usbnc_usb_uh1_ctrl = (u32 *)(MX6_USBNC_BASEADDR + 4);
+ u32 val;
+
+ switch (port) {
+ case 0:
+ cm_fx6_init_usb_otg();
+ break;
+ case 1:
+ SETUP_IOMUX_PAD(PAD_GPIO_0__USB_H1_PWR |
+ MUX_PAD_CTRL(NO_PAD_CTRL));
+
+ /* Set PWR polarity to match power switch's enable polarity */
+ val = __raw_readl(usbnc_usb_uh1_ctrl);
+ val |= USBNC_USB_H1_PWR_POL;
+ __raw_writel(val, usbnc_usb_uh1_ctrl);
+ return cm_fx6_usb_hub_reset();
+ default:
+ break;
+ }
+
+ return 0;
+}
+
+int board_ehci_power(int port, int on)
+{
+ return port ? 0 : gpio_direction_output(SB_FX6_USB_OTG_PWR, on);
+}
+#endif
+
#ifdef CONFIG_FEC_MXC
#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h
index 94ff39e..bd04d62 100644
--- a/board/compulab/cm_fx6/common.h
+++ b/board/compulab/cm_fx6/common.h
@@ -16,6 +16,9 @@
#define CM_FX6_ECSPI_BUS0_CS0 IMX_GPIO_NR(2, 30)
#define CM_FX6_GREEN_LED IMX_GPIO_NR(2, 31)
#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8)
+#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8)
+#define CM_FX6_USB_HUB_RST IMX_GPIO_NR(7, 8)
+#define SB_FX6_USB_OTG_PWR IMX_GPIO_NR(3, 22)
#if defined(CONFIG_FSL_ESDHC)
#include <fsl_esdhc.h>
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index dbe8a19..f463cd1 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -203,6 +203,16 @@
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_NET_RETRY_COUNT 5
+/* USB */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_STORAGE
+#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS 0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
+
/* GPIO */
#define CONFIG_MXC_GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 15/18] arm: mx6: cm_fx6: add usb support
2014-08-10 17:12 ` [U-Boot] [PATCH V2 15/18] arm: mx6: cm_fx6: add usb support Nikita Kiryanov
@ 2014-08-13 14:04 ` Igor Grinberg
2014-08-19 14:49 ` Nikita Kiryanov
0 siblings, 1 reply; 34+ messages in thread
From: Igor Grinberg @ 2014-08-13 14:04 UTC (permalink / raw)
To: u-boot
On 08/10/14 20:12, Nikita Kiryanov wrote:
> Add USB and USB OTG host support for Compulab CM-FX6 CoM.
>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Tom Rini <trini@ti.com>
> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
> ---
> Changes in V2:
> - No changes
>
> board/compulab/cm_fx6/cm_fx6.c | 75 ++++++++++++++++++++++++++++++++++++++++++
> board/compulab/cm_fx6/common.h | 3 ++
> include/configs/cm_fx6.h | 10 ++++++
> 3 files changed, 88 insertions(+)
>
> diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
> index e993de2..28c54b4 100644
> --- a/board/compulab/cm_fx6/cm_fx6.c
> +++ b/board/compulab/cm_fx6/cm_fx6.c
[...]
> +static int cm_fx6_usb_hub_reset(void)
> +{
> + int err;
> +
> + err = gpio_request(CM_FX6_USB_HUB_RST, "usb hub rst");
> + if (err) {
> + printf("USB hub rst gpio request failed: %d\n", err);
> + return -1;
> + }
> +
> + SETUP_IOMUX_PAD(PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL));
> + gpio_direction_output(CM_FX6_USB_HUB_RST, 0);
> + udelay(10);
> + gpio_direction_output(CM_FX6_USB_HUB_RST, 1);
> + mdelay(1);
> +
> + return 0;
> +}
> +
> +static void cm_fx6_init_usb_otg(void)
Can this function also return int as the one above?
> +{
> + int ret;
> + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> +
> + ret = gpio_request(SB_FX6_USB_OTG_PWR, "usb-pwr");
> + if (ret)
> + printf("USB OTG pwr gpio request failed: %d\n", ret);
> +
> + SETUP_IOMUX_PAD(PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL));
> + SETUP_IOMUX_PAD(PAD_ENET_RX_ER__USB_OTG_ID |
> + MUX_PAD_CTRL(WEAK_PULLDOWN));
> + clrbits_le32(&iomux->gpr[1], IOMUXC_GPR1_OTG_ID_MASK);
> + /* disable ext. charger detect, or it'll affect signal quality at dp. */
> + gpio_direction_output(SB_FX6_USB_OTG_PWR, 0);
> +}
> +
> +#define MX6_USBNC_BASEADDR 0x2184800
> +#define USBNC_USB_H1_PWR_POL (1 << 9)
> +int board_ehci_hcd_init(int port)
> +{
> + u32 *usbnc_usb_uh1_ctrl = (u32 *)(MX6_USBNC_BASEADDR + 4);
> + u32 val;
> +
> + switch (port) {
> + case 0:
> + cm_fx6_init_usb_otg();
> + break;
> + case 1:
> + SETUP_IOMUX_PAD(PAD_GPIO_0__USB_H1_PWR |
> + MUX_PAD_CTRL(NO_PAD_CTRL));
> +
> + /* Set PWR polarity to match power switch's enable polarity */
> + val = __raw_readl(usbnc_usb_uh1_ctrl);
> + val |= USBNC_USB_H1_PWR_POL;
> + __raw_writel(val, usbnc_usb_uh1_ctrl);
Can we have setbits_le32() here?
> + return cm_fx6_usb_hub_reset();
> + default:
> + break;
> + }
> +
> + return 0;
> +}
> +
> +int board_ehci_power(int port, int on)
> +{
> + return port ? 0 : gpio_direction_output(SB_FX6_USB_OTG_PWR, on);
Here port is a port number, not some bool conditional.
Please be explicit about it and don't use the construct above for such cases.
[...]
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 15/18] arm: mx6: cm_fx6: add usb support
2014-08-13 14:04 ` Igor Grinberg
@ 2014-08-19 14:49 ` Nikita Kiryanov
0 siblings, 0 replies; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-19 14:49 UTC (permalink / raw)
To: u-boot
Hi Igor,
On 13/08/14 17:04, Igor Grinberg wrote:
> On 08/10/14 20:12, Nikita Kiryanov wrote:
>> Add USB and USB OTG host support for Compulab CM-FX6 CoM.
>>
>> Cc: Igor Grinberg <grinberg@compulab.co.il>
>> Cc: Stefano Babic <sbabic@denx.de>
>> Cc: Tom Rini <trini@ti.com>
>> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
>> ---
>> Changes in V2:
>> - No changes
>>
>> board/compulab/cm_fx6/cm_fx6.c | 75 ++++++++++++++++++++++++++++++++++++++++++
>> board/compulab/cm_fx6/common.h | 3 ++
>> include/configs/cm_fx6.h | 10 ++++++
>> 3 files changed, 88 insertions(+)
>>
>> diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
>> index e993de2..28c54b4 100644
>> --- a/board/compulab/cm_fx6/cm_fx6.c
>> +++ b/board/compulab/cm_fx6/cm_fx6.c
>
> [...]
>
>> +static int cm_fx6_usb_hub_reset(void)
>> +{
>> + int err;
>> +
>> + err = gpio_request(CM_FX6_USB_HUB_RST, "usb hub rst");
>> + if (err) {
>> + printf("USB hub rst gpio request failed: %d\n", err);
>> + return -1;
>> + }
>> +
>> + SETUP_IOMUX_PAD(PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL));
>> + gpio_direction_output(CM_FX6_USB_HUB_RST, 0);
>> + udelay(10);
>> + gpio_direction_output(CM_FX6_USB_HUB_RST, 1);
>> + mdelay(1);
>> +
>> + return 0;
>> +}
>> +
>> +static void cm_fx6_init_usb_otg(void)
>
> Can this function also return int as the one above?
Sure.
>
>> +{
>> + int ret;
>> + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
>> +
>> + ret = gpio_request(SB_FX6_USB_OTG_PWR, "usb-pwr");
>> + if (ret)
>> + printf("USB OTG pwr gpio request failed: %d\n", ret);
>> +
>> + SETUP_IOMUX_PAD(PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL));
>> + SETUP_IOMUX_PAD(PAD_ENET_RX_ER__USB_OTG_ID |
>> + MUX_PAD_CTRL(WEAK_PULLDOWN));
>> + clrbits_le32(&iomux->gpr[1], IOMUXC_GPR1_OTG_ID_MASK);
>> + /* disable ext. charger detect, or it'll affect signal quality at dp. */
>> + gpio_direction_output(SB_FX6_USB_OTG_PWR, 0);
>> +}
>> +
>> +#define MX6_USBNC_BASEADDR 0x2184800
>> +#define USBNC_USB_H1_PWR_POL (1 << 9)
>> +int board_ehci_hcd_init(int port)
>> +{
>> + u32 *usbnc_usb_uh1_ctrl = (u32 *)(MX6_USBNC_BASEADDR + 4);
>> + u32 val;
>> +
>> + switch (port) {
>> + case 0:
>> + cm_fx6_init_usb_otg();
>> + break;
>> + case 1:
>> + SETUP_IOMUX_PAD(PAD_GPIO_0__USB_H1_PWR |
>> + MUX_PAD_CTRL(NO_PAD_CTRL));
>> +
>> + /* Set PWR polarity to match power switch's enable polarity */
>> + val = __raw_readl(usbnc_usb_uh1_ctrl);
>> + val |= USBNC_USB_H1_PWR_POL;
>> + __raw_writel(val, usbnc_usb_uh1_ctrl);
>
> Can we have setbits_le32() here?
Sure.
>
>> + return cm_fx6_usb_hub_reset();
>> + default:
>> + break;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> +int board_ehci_power(int port, int on)
>> +{
>> + return port ? 0 : gpio_direction_output(SB_FX6_USB_OTG_PWR, on);
>
> Here port is a port number, not some bool conditional.
> Please be explicit about it and don't use the construct above for such cases.
OK I'll rewrite it.
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V2 16/18] arm: mx6: cm_fx6: add i2c support
2014-08-10 17:12 [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Nikita Kiryanov
` (5 preceding siblings ...)
2014-08-10 17:12 ` [U-Boot] [PATCH V2 15/18] arm: mx6: cm_fx6: add usb support Nikita Kiryanov
@ 2014-08-10 17:12 ` Nikita Kiryanov
2014-08-14 6:55 ` Igor Grinberg
2014-08-10 17:12 ` [U-Boot] [PATCH V2 17/18] arm: mx6: cm_fx6: use eeprom Nikita Kiryanov
` (2 subsequent siblings)
9 siblings, 1 reply; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-10 17:12 UTC (permalink / raw)
To: u-boot
Add support for all 3 I2C busses on Compulab CM-FX6 CoM.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V2:
- No changes
board/compulab/cm_fx6/cm_fx6.c | 42 ++++++++++++++++++++++++++++++++++++++++++
include/configs/cm_fx6.h | 11 +++++++++++
2 files changed, 53 insertions(+)
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index 28c54b4..1b967e5 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -15,12 +15,53 @@
#include <asm/arch/crm_regs.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/iomux.h>
+#include <asm/imx-common/mxc_i2c.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include "common.h"
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_SYS_I2C_MXC
+#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
+ PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+I2C_PADS(i2c0_pads,
+ PAD_EIM_D21__I2C1_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ PAD_EIM_D21__GPIO3_IO21 | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ IMX_GPIO_NR(3, 21),
+ PAD_EIM_D28__I2C1_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ PAD_EIM_D28__GPIO3_IO28 | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ IMX_GPIO_NR(3, 28));
+
+I2C_PADS(i2c1_pads,
+ PAD_KEY_COL3__I2C2_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ PAD_KEY_COL3__GPIO4_IO12 | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ IMX_GPIO_NR(4, 12),
+ PAD_KEY_ROW3__I2C2_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ PAD_KEY_ROW3__GPIO4_IO13 | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ IMX_GPIO_NR(4, 13));
+
+I2C_PADS(i2c2_pads,
+ PAD_GPIO_3__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ PAD_GPIO_3__GPIO1_IO03 | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ IMX_GPIO_NR(1, 3),
+ PAD_GPIO_6__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ PAD_GPIO_6__GPIO1_IO06 | MUX_PAD_CTRL(I2C_PAD_CTRL),
+ IMX_GPIO_NR(1, 6));
+
+
+static void cm_fx6_setup_i2c(void)
+{
+ setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, I2C_PADS_INFO(i2c0_pads));
+ setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, I2C_PADS_INFO(i2c1_pads));
+ setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, I2C_PADS_INFO(i2c2_pads));
+}
+#else
+static void cm_fx6_setup_i2c(void) { }
+#endif
+
#ifdef CONFIG_USB_EHCI_MX6
#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \
PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
@@ -245,6 +286,7 @@ int board_init(void)
{
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
cm_fx6_setup_gpmi_nand();
+ cm_fx6_setup_i2c();
return 0;
}
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index f463cd1..0aa88fd 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -213,6 +213,17 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
+/* I2C */
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_MXC_I2C3_SPEED 400000
+
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
+#define CONFIG_SYS_I2C_EEPROM_BUS 2
+
/* GPIO */
#define CONFIG_MXC_GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 17/18] arm: mx6: cm_fx6: use eeprom
2014-08-10 17:12 [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Nikita Kiryanov
` (6 preceding siblings ...)
2014-08-10 17:12 ` [U-Boot] [PATCH V2 16/18] arm: mx6: cm_fx6: add i2c support Nikita Kiryanov
@ 2014-08-10 17:12 ` Nikita Kiryanov
2014-08-14 6:59 ` Igor Grinberg
2014-08-10 17:13 ` [U-Boot] [PATCH V2 18/18] arm: mx6: cm_fx6: add sata support Nikita Kiryanov
2014-08-11 0:11 ` [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Simon Glass
9 siblings, 1 reply; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-10 17:12 UTC (permalink / raw)
To: u-boot
Use Compulab eeprom module to obtain revision number, serial number, and
mac address from the EEPROM.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V2:
- No changes
board/compulab/cm_fx6/cm_fx6.c | 26 +++++++++++++++++++++++++-
include/configs/cm_fx6.h | 2 ++
2 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index 1b967e5..76d7430 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -19,6 +19,7 @@
#include <asm/io.h>
#include <asm/gpio.h>
#include "common.h"
+#include "../common/eeprom.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -207,8 +208,31 @@ static iomux_v3_cfg_t const enet_pads[] = {
MUX_PAD_CTRL(ENET_PAD_CTRL)),
};
+static int handle_mac_address(void)
+{
+ unsigned char enetaddr[6];
+ int rc;
+
+ rc = eth_getenv_enetaddr("ethaddr", enetaddr);
+ if (rc)
+ return 0;
+
+ rc = cl_eeprom_read_mac_addr(enetaddr);
+ if (rc)
+ return rc;
+
+ if (!is_valid_ether_addr(enetaddr))
+ return -1;
+
+ return eth_setenv_enetaddr("ethaddr", enetaddr);
+}
+
int board_eth_init(bd_t *bis)
{
+ int res = handle_mac_address();
+ if (res)
+ puts("No MAC address found\n");
+
SETUP_IOMUX_PADS(enet_pads);
/* phy reset */
gpio_direction_output(CM_FX6_ENET_NRST, 0);
@@ -348,5 +372,5 @@ int dram_init(void)
u32 get_board_rev(void)
{
- return 100;
+ return cl_eeprom_get_board_rev();
}
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 0aa88fd..adfd55e 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -236,6 +236,8 @@
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+#define CONFIG_SERIAL_TAG
/* misc */
#define CONFIG_SYS_GENERIC_BOARD
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 17/18] arm: mx6: cm_fx6: use eeprom
2014-08-10 17:12 ` [U-Boot] [PATCH V2 17/18] arm: mx6: cm_fx6: use eeprom Nikita Kiryanov
@ 2014-08-14 6:59 ` Igor Grinberg
0 siblings, 0 replies; 34+ messages in thread
From: Igor Grinberg @ 2014-08-14 6:59 UTC (permalink / raw)
To: u-boot
On 08/10/14 20:12, Nikita Kiryanov wrote:
> Use Compulab eeprom module to obtain revision number, serial number, and
> mac address from the EEPROM.
>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Tom Rini <trini@ti.com>
> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
> ---
> Changes in V2:
> - No changes
>
> board/compulab/cm_fx6/cm_fx6.c | 26 +++++++++++++++++++++++++-
> include/configs/cm_fx6.h | 2 ++
> 2 files changed, 27 insertions(+), 1 deletion(-)
>
> diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
> index 1b967e5..76d7430 100644
> --- a/board/compulab/cm_fx6/cm_fx6.c
> +++ b/board/compulab/cm_fx6/cm_fx6.c
[...]
> @@ -348,5 +372,5 @@ int dram_init(void)
>
> u32 get_board_rev(void)
> {
> - return 100;
> + return cl_eeprom_get_board_rev();
> }
I would expect this function to be introduced here and
not before this patch - along with I2C support and CONFIG_REVISION_TAG.
> diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
> index 0aa88fd..adfd55e 100644
> --- a/include/configs/cm_fx6.h
> +++ b/include/configs/cm_fx6.h
> @@ -236,6 +236,8 @@
> #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
> #define CONFIG_SETUP_MEMORY_TAGS
> #define CONFIG_INITRD_TAG
> +#define CONFIG_REVISION_TAG
> +#define CONFIG_SERIAL_TAG
>
> /* misc */
> #define CONFIG_SYS_GENERIC_BOARD
>
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V2 18/18] arm: mx6: cm_fx6: add sata support
2014-08-10 17:12 [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Nikita Kiryanov
` (7 preceding siblings ...)
2014-08-10 17:12 ` [U-Boot] [PATCH V2 17/18] arm: mx6: cm_fx6: use eeprom Nikita Kiryanov
@ 2014-08-10 17:13 ` Nikita Kiryanov
2014-08-14 7:10 ` Igor Grinberg
2014-08-11 0:11 ` [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Simon Glass
9 siblings, 1 reply; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-10 17:13 UTC (permalink / raw)
To: u-boot
Add support for SATA.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
---
Changes in V2:
- No changes
board/compulab/cm_fx6/cm_fx6.c | 90 ++++++++++++++++++++++++++++++++++++++++++
board/compulab/cm_fx6/common.h | 13 ++++++
include/configs/cm_fx6.h | 36 ++++++++++++++++-
3 files changed, 138 insertions(+), 1 deletion(-)
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index 76d7430..8a48f9d 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -12,10 +12,12 @@
#include <miiphy.h>
#include <netdev.h>
#include <fdt_support.h>
+#include <sata.h>
#include <asm/arch/crm_regs.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/iomux.h>
#include <asm/imx-common/mxc_i2c.h>
+#include <asm/imx-common/sata.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include "common.h"
@@ -23,6 +25,94 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_DWC_AHSATA
+static int cm_fx6_issd_gpios[] = {
+ /* The order of the GPIOs in the array is important! */
+ CM_FX6_SATA_PHY_SLP,
+ CM_FX6_SATA_NRSTDLY,
+ CM_FX6_SATA_PWREN,
+ CM_FX6_SATA_NSTANDBY1,
+ CM_FX6_SATA_NSTANDBY2,
+ CM_FX6_SATA_LDO_EN,
+};
+
+static void cm_fx6_sata_power(int on)
+{
+ int i;
+
+ if (!on) { /* tell the iSSD that the power will be removed */
+ gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 1);
+ mdelay(10);
+ }
+
+ for (i = 0; i < ARRAY_SIZE(cm_fx6_issd_gpios); i++) {
+ gpio_direction_output(cm_fx6_issd_gpios[i], on);
+ udelay(100);
+ }
+
+ if (!on) /* for compatibility lower the power loss interrupt */
+ gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0);
+}
+
+static iomux_v3_cfg_t const sata_pads[] = {
+ /* SATA PWR */
+ IOMUX_PADS(PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_A22__GPIO2_IO16 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_D20__GPIO3_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ /* SATA CTRL */
+ IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+ IOMUX_PADS(PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),
+
+};
+
+static void cm_fx6_setup_issd(void)
+{
+ SETUP_IOMUX_PADS(sata_pads);
+ /* Make sure this gpio has logical 0 value */
+ gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0);
+ udelay(100);
+
+ cm_fx6_sata_power(0);
+ mdelay(250);
+ cm_fx6_sata_power(1);
+}
+
+#define CM_FX6_SATA_INIT_RETRIES 10
+int sata_initialize(void)
+{
+ int err, i;
+
+ cm_fx6_setup_issd();
+ for (i = 0; i < CM_FX6_SATA_INIT_RETRIES; i++) {
+ err = setup_sata();
+ if (err) {
+ printf("SATA setup failed: %d\n", err);
+ return err;
+ }
+
+ udelay(100);
+
+ err = __sata_initialize();
+ if (!err)
+ break;
+
+ /* There is no device on the SATA port */
+ if (sata_port_status(0, 0) == 0)
+ break;
+
+ /* There's a device, but link not established. Retry */
+ }
+
+ return err;
+}
+#else
+static void cm_fx6_setup_issd(void) {}
+#endif
+
#ifdef CONFIG_SYS_I2C_MXC
#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h
index bd04d62..ddccffb 100644
--- a/board/compulab/cm_fx6/common.h
+++ b/board/compulab/cm_fx6/common.h
@@ -19,6 +19,19 @@
#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8)
#define CM_FX6_USB_HUB_RST IMX_GPIO_NR(7, 8)
#define SB_FX6_USB_OTG_PWR IMX_GPIO_NR(3, 22)
+#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8)
+#define CM_FX6_USB_HUB_RST IMX_GPIO_NR(7, 8)
+#define SB_FX6_USB_OTG_PWR IMX_GPIO_NR(3, 22)
+#define CM_FX6_SATA_PWREN IMX_GPIO_NR(1, 28)
+#define CM_FX6_SATA_VDDC_CTRL IMX_GPIO_NR(1, 30)
+#define CM_FX6_SATA_LDO_EN IMX_GPIO_NR(2, 16)
+#define CM_FX6_SATA_NSTANDBY1 IMX_GPIO_NR(3, 20)
+#define CM_FX6_SATA_PHY_SLP IMX_GPIO_NR(3, 23)
+#define CM_FX6_SATA_STBY_REQ IMX_GPIO_NR(3, 29)
+#define CM_FX6_SATA_NSTANDBY2 IMX_GPIO_NR(5, 2)
+#define CM_FX6_SATA_NRSTDLY IMX_GPIO_NR(6, 6)
+#define CM_FX6_SATA_PWLOSS_INT IMX_GPIO_NR(6, 31)
+
#if defined(CONFIG_FSL_ESDHC)
#include <fsl_esdhc.h>
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index adfd55e..88925cd 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -132,6 +132,19 @@
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"run doboot\0" \
+ "satadev=0\0" \
+ "sataroot=/dev/sda2 rw rootwait\0" \
+ "sataargs=setenv bootargs console=${console} " \
+ "root=${sataroot} " \
+ "${video}\0" \
+ "loadsatabootscript=fatload sata ${satadev} ${loadaddr} ${bootscr}\0" \
+ "satabootscript=echo Running bootscript from sata ...; " \
+ "source ${loadaddr}\0" \
+ "sataloadkernel=fatload sata ${satadev} ${loadaddr} ${kernel}\0" \
+ "sataloadfdt=fatload sata ${satadev} ${fdtaddr} ${fdtfile}\0" \
+ "sataboot=echo Booting from sata ...; "\
+ "run sataargs; " \
+ "run doboot\0" \
"nandroot=/dev/mtdblock4 rw\0" \
"nandrootfstype=ubifs\0" \
"nandargs=setenv bootargs console=${console} " \
@@ -158,7 +171,19 @@
"run mmcboot;" \
"fi;" \
"fi;" \
- "fi;"
+ "fi;" \
+ "if sata init; then " \
+ "if run loadsatabootscript; then " \
+ "run satabootscript;" \
+ "else "\
+ "if run sataloadkernel; then " \
+ "if ${loadfdt}; then " \
+ "run sataloadfdt; " \
+ "fi;" \
+ "run sataboot;" \
+ "fi;" \
+ "fi;" \
+ "fi;\0"
#define CONFIG_BOOTCOMMAND \
"run setboottypem; run boot"
@@ -224,6 +249,15 @@
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 2
+/* SATA */
+#define CONFIG_CMD_SATA
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
+#define CONFIG_LIBATA
+#define CONFIG_LBA48
+#define CONFIG_DWC_AHSATA
+#define CONFIG_DWC_AHSATA_PORT_ID 0
+#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
+
/* GPIO */
#define CONFIG_MXC_GPIO
--
1.9.1
^ permalink raw reply related [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 18/18] arm: mx6: cm_fx6: add sata support
2014-08-10 17:13 ` [U-Boot] [PATCH V2 18/18] arm: mx6: cm_fx6: add sata support Nikita Kiryanov
@ 2014-08-14 7:10 ` Igor Grinberg
2014-08-19 14:51 ` Nikita Kiryanov
0 siblings, 1 reply; 34+ messages in thread
From: Igor Grinberg @ 2014-08-14 7:10 UTC (permalink / raw)
To: u-boot
Hi Nikita,
On 08/10/14 20:13, Nikita Kiryanov wrote:
> Add support for SATA.
>
> Cc: Igor Grinberg <grinberg@compulab.co.il>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Tom Rini <trini@ti.com>
> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
> ---
> Changes in V2:
> - No changes
>
> board/compulab/cm_fx6/cm_fx6.c | 90 ++++++++++++++++++++++++++++++++++++++++++
> board/compulab/cm_fx6/common.h | 13 ++++++
> include/configs/cm_fx6.h | 36 ++++++++++++++++-
> 3 files changed, 138 insertions(+), 1 deletion(-)
>
> diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
> index 76d7430..8a48f9d 100644
> --- a/board/compulab/cm_fx6/cm_fx6.c
> +++ b/board/compulab/cm_fx6/cm_fx6.c
[...]
> @@ -23,6 +25,94 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +#ifdef CONFIG_DWC_AHSATA
> +static int cm_fx6_issd_gpios[] = {
> + /* The order of the GPIOs in the array is important! */
> + CM_FX6_SATA_PHY_SLP,
> + CM_FX6_SATA_NRSTDLY,
> + CM_FX6_SATA_PWREN,
> + CM_FX6_SATA_NSTANDBY1,
> + CM_FX6_SATA_NSTANDBY2,
> + CM_FX6_SATA_LDO_EN,
> +};
> +
> +static void cm_fx6_sata_power(int on)
Will it be/look better to use bool here?
> +{
> + int i;
> +
> + if (!on) { /* tell the iSSD that the power will be removed */
> + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 1);
> + mdelay(10);
> + }
> +
> + for (i = 0; i < ARRAY_SIZE(cm_fx6_issd_gpios); i++) {
> + gpio_direction_output(cm_fx6_issd_gpios[i], on);
> + udelay(100);
> + }
> +
> + if (!on) /* for compatibility lower the power loss interrupt */
> + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0);
> +}
[...]
> +static void cm_fx6_setup_issd(void)
> +{
> + SETUP_IOMUX_PADS(sata_pads);
> + /* Make sure this gpio has logical 0 value */
> + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0);
> + udelay(100);
> +
> + cm_fx6_sata_power(0);
> + mdelay(250);
> + cm_fx6_sata_power(1);
> +}
> +
> +#define CM_FX6_SATA_INIT_RETRIES 10
> +int sata_initialize(void)
> +{
> + int err, i;
> +
> + cm_fx6_setup_issd();
> + for (i = 0; i < CM_FX6_SATA_INIT_RETRIES; i++) {
> + err = setup_sata();
> + if (err) {
> + printf("SATA setup failed: %d\n", err);
> + return err;
> + }
> +
> + udelay(100);
> +
> + err = __sata_initialize();
> + if (!err)
> + break;
> +
> + /* There is no device on the SATA port */
> + if (sata_port_status(0, 0) == 0)
> + break;
> +
> + /* There's a device, but link not established. Retry */
> + }
> +
> + return err;
> +}
> +#else
> +static void cm_fx6_setup_issd(void) {}
Why do you need this one?
It is only called from sata_initialize(), which is inside
#ifdef CONFIG_DWC_AHSATA
and is not available otherwise.
> +#endif
> +
> #ifdef CONFIG_SYS_I2C_MXC
> #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
> PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
[...]
> diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
> index adfd55e..88925cd 100644
> --- a/include/configs/cm_fx6.h
> +++ b/include/configs/cm_fx6.h
> @@ -132,6 +132,19 @@
> "mmcboot=echo Booting from mmc ...; " \
> "run mmcargs; " \
> "run doboot\0" \
> + "satadev=0\0" \
> + "sataroot=/dev/sda2 rw rootwait\0" \
> + "sataargs=setenv bootargs console=${console} " \
> + "root=${sataroot} " \
> + "${video}\0" \
> + "loadsatabootscript=fatload sata ${satadev} ${loadaddr} ${bootscr}\0" \
> + "satabootscript=echo Running bootscript from sata ...; " \
> + "source ${loadaddr}\0" \
> + "sataloadkernel=fatload sata ${satadev} ${loadaddr} ${kernel}\0" \
> + "sataloadfdt=fatload sata ${satadev} ${fdtaddr} ${fdtfile}\0" \
Can we switch to use load instead of explicit fatload?
[...]
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 18/18] arm: mx6: cm_fx6: add sata support
2014-08-14 7:10 ` Igor Grinberg
@ 2014-08-19 14:51 ` Nikita Kiryanov
0 siblings, 0 replies; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-19 14:51 UTC (permalink / raw)
To: u-boot
Hi Igor,
On 14/08/14 10:10, Igor Grinberg wrote:
>> +
>> +static void cm_fx6_sata_power(int on)
>
> Will it be/look better to use bool here?
This will create a situation where a bool is passed to a function which
takes an int (gpio_direction_output()), and that irks me a little. At
least treating ints as bools is a common C idiom; the inverse is not.
>
>> +{
>> + int i;
>> +
>> + if (!on) { /* tell the iSSD that the power will be removed */
>> + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 1);
>> + mdelay(10);
>> + }
>> +
>> + for (i = 0; i < ARRAY_SIZE(cm_fx6_issd_gpios); i++) {
>> + gpio_direction_output(cm_fx6_issd_gpios[i], on);
>> + udelay(100);
>> + }
>> +
>> + if (!on) /* for compatibility lower the power loss interrupt */
>> + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0);
>> +}
>
> [...]
>
>> +static void cm_fx6_setup_issd(void)
>> +{
>> + SETUP_IOMUX_PADS(sata_pads);
>> + /* Make sure this gpio has logical 0 value */
>> + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0);
>> + udelay(100);
>> +
>> + cm_fx6_sata_power(0);
>> + mdelay(250);
>> + cm_fx6_sata_power(1);
>> +}
>> +
>> +#define CM_FX6_SATA_INIT_RETRIES 10
>> +int sata_initialize(void)
>> +{
>> + int err, i;
>> +
>> + cm_fx6_setup_issd();
>> + for (i = 0; i < CM_FX6_SATA_INIT_RETRIES; i++) {
>> + err = setup_sata();
>> + if (err) {
>> + printf("SATA setup failed: %d\n", err);
>> + return err;
>> + }
>> +
>> + udelay(100);
>> +
>> + err = __sata_initialize();
>> + if (!err)
>> + break;
>> +
>> + /* There is no device on the SATA port */
>> + if (sata_port_status(0, 0) == 0)
>> + break;
>> +
>> + /* There's a device, but link not established. Retry */
>> + }
>> +
>> + return err;
>> +}
>> +#else
>> +static void cm_fx6_setup_issd(void) {}
>
> Why do you need this one?
> It is only called from sata_initialize(), which is inside
> #ifdef CONFIG_DWC_AHSATA
> and is not available otherwise.
>
Yes you're right. This is a remnant of a past version.
Will remove.
>> +#endif
>> +
>> #ifdef CONFIG_SYS_I2C_MXC
>> #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
>> PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
>
> [...]
>
>> diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
>> index adfd55e..88925cd 100644
>> --- a/include/configs/cm_fx6.h
>> +++ b/include/configs/cm_fx6.h
>> @@ -132,6 +132,19 @@
>> "mmcboot=echo Booting from mmc ...; " \
>> "run mmcargs; " \
>> "run doboot\0" \
>> + "satadev=0\0" \
>> + "sataroot=/dev/sda2 rw rootwait\0" \
>> + "sataargs=setenv bootargs console=${console} " \
>> + "root=${sataroot} " \
>> + "${video}\0" \
>> + "loadsatabootscript=fatload sata ${satadev} ${loadaddr} ${bootscr}\0" \
>> + "satabootscript=echo Running bootscript from sata ...; " \
>> + "source ${loadaddr}\0" \
>> + "sataloadkernel=fatload sata ${satadev} ${loadaddr} ${kernel}\0" \
>> + "sataloadfdt=fatload sata ${satadev} ${fdtaddr} ${fdtfile}\0" \
>
> Can we switch to use load instead of explicit fatload?
Sure
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.)
2014-08-10 17:12 [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Nikita Kiryanov
` (8 preceding siblings ...)
2014-08-10 17:13 ` [U-Boot] [PATCH V2 18/18] arm: mx6: cm_fx6: add sata support Nikita Kiryanov
@ 2014-08-11 0:11 ` Simon Glass
2014-08-11 8:05 ` Igor Grinberg
2014-08-11 8:20 ` Nikita Kiryanov
9 siblings, 2 replies; 34+ messages in thread
From: Simon Glass @ 2014-08-11 0:11 UTC (permalink / raw)
To: u-boot
Hi Nikita,
On 10 August 2014 11:12, Nikita Kiryanov <nikita@compulab.co.il> wrote:
> This partial V2 completes the previous partial V2. It contains some final
> preparational steps, and the introduction of cm-fx6 board.
>
> Changes in V2:
> - Update commit message of "arm: mx6: ddr: configure MMDC for slow_pd"
> - Remove unnecessary line removal from arch/arm/cpu/armv7/mx6/ddr.c
> - Move probe_mmdc_config() code straight to dram_init()
> - Use imx6_spl.h
> - Use imx_ddr_size()
> NOTE: the correction of this patch now depends on https://patchwork.ozlabs.org/patch/376095/
Does this series support the dual core Utilite machine? If so I'm not
sure how to enable dual core instead of quad core - any ideas please?
Regards,
Simon
^ permalink raw reply [flat|nested] 34+ messages in thread* [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.)
2014-08-11 0:11 ` [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Simon Glass
@ 2014-08-11 8:05 ` Igor Grinberg
2014-08-11 8:20 ` Nikita Kiryanov
1 sibling, 0 replies; 34+ messages in thread
From: Igor Grinberg @ 2014-08-11 8:05 UTC (permalink / raw)
To: u-boot
Hi Simon,
On 08/11/14 03:11, Simon Glass wrote:
> Hi Nikita,
>
> On 10 August 2014 11:12, Nikita Kiryanov <nikita@compulab.co.il> wrote:
>> This partial V2 completes the previous partial V2. It contains some final
>> preparational steps, and the introduction of cm-fx6 board.
>>
>> Changes in V2:
>> - Update commit message of "arm: mx6: ddr: configure MMDC for slow_pd"
>> - Remove unnecessary line removal from arch/arm/cpu/armv7/mx6/ddr.c
>> - Move probe_mmdc_config() code straight to dram_init()
>> - Use imx6_spl.h
>> - Use imx_ddr_size()
>> NOTE: the correction of this patch now depends on https://patchwork.ozlabs.org/patch/376095/
>
> Does this series support the dual core Utilite machine?
Yep.
> If so I'm not
> sure how to enable dual core instead of quad core - any ideas please?
I don't understand the question. What do you mean by enable?
--
Regards,
Igor.
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.)
2014-08-11 0:11 ` [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.) Simon Glass
2014-08-11 8:05 ` Igor Grinberg
@ 2014-08-11 8:20 ` Nikita Kiryanov
2014-08-11 14:15 ` Simon Glass
1 sibling, 1 reply; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-11 8:20 UTC (permalink / raw)
To: u-boot
Hi Simon,
On 11/08/14 03:11, Simon Glass wrote:
> Hi Nikita,
>
> On 10 August 2014 11:12, Nikita Kiryanov <nikita@compulab.co.il> wrote:
>> This partial V2 completes the previous partial V2. It contains some final
>> preparational steps, and the introduction of cm-fx6 board.
>>
>> Changes in V2:
>> - Update commit message of "arm: mx6: ddr: configure MMDC for slow_pd"
>> - Remove unnecessary line removal from arch/arm/cpu/armv7/mx6/ddr.c
>> - Move probe_mmdc_config() code straight to dram_init()
>> - Use imx6_spl.h
>> - Use imx_ddr_size()
>> NOTE: the correction of this patch now depends on https://patchwork.ozlabs.org/patch/376095/
>
> Does this series support the dual core Utilite machine?
It does support dual core, but not the Utilite boot sequence. Right now
you can only boot from MMC because SPL has no fallback functionality and
Utilite always tries MMC first. I'll be sending patches for that after
this series is accepted.
> If so I'm not sure how to enable dual core instead of quad core - any ideas please?
You don't need to do anything to run this on dual core. ...or am I
misunderstanding your question?
>
> Regards,
> Simon
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.)
2014-08-11 8:20 ` Nikita Kiryanov
@ 2014-08-11 14:15 ` Simon Glass
2014-08-11 14:39 ` Nikita Kiryanov
0 siblings, 1 reply; 34+ messages in thread
From: Simon Glass @ 2014-08-11 14:15 UTC (permalink / raw)
To: u-boot
Hi,
On 11 August 2014 02:20, Nikita Kiryanov <nikita@compulab.co.il> wrote:
> Hi Simon,
>
>
> On 11/08/14 03:11, Simon Glass wrote:
>>
>> Hi Nikita,
>>
>> On 10 August 2014 11:12, Nikita Kiryanov <nikita@compulab.co.il> wrote:
>>>
>>> This partial V2 completes the previous partial V2. It contains some final
>>> preparational steps, and the introduction of cm-fx6 board.
>>>
>>> Changes in V2:
>>> - Update commit message of "arm: mx6: ddr: configure MMDC for
>>> slow_pd"
>>> - Remove unnecessary line removal from
>>> arch/arm/cpu/armv7/mx6/ddr.c
>>> - Move probe_mmdc_config() code straight to dram_init()
>>> - Use imx6_spl.h
>>> - Use imx_ddr_size()
>>> NOTE: the correction of this patch now depends on
>>> https://patchwork.ozlabs.org/patch/376095/
>>
>>
>> Does this series support the dual core Utilite machine?
>
>
> It does support dual core, but not the Utilite boot sequence. Right now
> you can only boot from MMC because SPL has no fallback functionality and
> Utilite always tries MMC first. I'll be sending patches for that after
> this series is accepted.
>
>
>> If so I'm not sure how to enable dual core instead of quad core - any
>> ideas please?
>
>
> You don't need to do anything to run this on dual core. ...or am I
> misunderstanding your question?
I'm not sure. It was failing to boot from SD and I thought that might
be the problems, since I see quite a few CPU-related configs in the
board config file. Is there a canonical description of how to making a
boot image and put it on SD? Perhaps I was doing that incorrectly.
Thanks,
Simon
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.)
2014-08-11 14:15 ` Simon Glass
@ 2014-08-11 14:39 ` Nikita Kiryanov
2014-08-12 14:39 ` Simon Glass
0 siblings, 1 reply; 34+ messages in thread
From: Nikita Kiryanov @ 2014-08-11 14:39 UTC (permalink / raw)
To: u-boot
On 11/08/14 17:15, Simon Glass wrote:
> Hi,
>
> On 11 August 2014 02:20, Nikita Kiryanov <nikita@compulab.co.il> wrote:
>> Hi Simon,
>>
>>
>> On 11/08/14 03:11, Simon Glass wrote:
>>>
>>> Hi Nikita,
>>>
>>> On 10 August 2014 11:12, Nikita Kiryanov <nikita@compulab.co.il> wrote:
>>>>
>>>> This partial V2 completes the previous partial V2. It contains some final
>>>> preparational steps, and the introduction of cm-fx6 board.
>>>>
>>>> Changes in V2:
>>>> - Update commit message of "arm: mx6: ddr: configure MMDC for
>>>> slow_pd"
>>>> - Remove unnecessary line removal from
>>>> arch/arm/cpu/armv7/mx6/ddr.c
>>>> - Move probe_mmdc_config() code straight to dram_init()
>>>> - Use imx6_spl.h
>>>> - Use imx_ddr_size()
>>>> NOTE: the correction of this patch now depends on
>>>> https://patchwork.ozlabs.org/patch/376095/
>>>
>>>
>>> Does this series support the dual core Utilite machine?
>>
>>
>> It does support dual core, but not the Utilite boot sequence. Right now
>> you can only boot from MMC because SPL has no fallback functionality and
>> Utilite always tries MMC first. I'll be sending patches for that after
>> this series is accepted.
>>
>>
>>> If so I'm not sure how to enable dual core instead of quad core - any
>>> ideas please?
>>
>>
>> You don't need to do anything to run this on dual core. ...or am I
>> misunderstanding your question?
>
> I'm not sure. It was failing to boot from SD and I thought that might
> be the problems, since I see quite a few CPU-related configs in the
> board config file. Is there a canonical description of how to making a
> boot image and put it on SD? Perhaps I was doing that incorrectly.
You can use the article from the Compulab wiki:
http://compulab.co.il/workspace/mediawiki/index.php5/CM-FX6:_U-Boot:_Creating_a_bootable_SD_card
This article assumes that both SPL and U-Boot reside on a single
binary at the right offsets. The following article describes the
steps for creating this joined image:
http://compulab.co.il/workspace/mediawiki/index.php5/CM-FX6:_U-Boot:_Building_Images#Building_the_firmware_images
>
> Thanks,
> Simon
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* [U-Boot] [PATCH V2 00/18] Introduce cm-fx6 board (partial V2 cont.)
2014-08-11 14:39 ` Nikita Kiryanov
@ 2014-08-12 14:39 ` Simon Glass
0 siblings, 0 replies; 34+ messages in thread
From: Simon Glass @ 2014-08-12 14:39 UTC (permalink / raw)
To: u-boot
Hi Nikita,
On 11 August 2014 08:39, Nikita Kiryanov <nikita@compulab.co.il> wrote:
>
>
> On 11/08/14 17:15, Simon Glass wrote:
>>
>> Hi,
>>
>> On 11 August 2014 02:20, Nikita Kiryanov <nikita@compulab.co.il> wrote:
>>>
>>> Hi Simon,
>>>
>>>
>>> On 11/08/14 03:11, Simon Glass wrote:
>>>>
>>>>
>>>> Hi Nikita,
>>>>
>>>> On 10 August 2014 11:12, Nikita Kiryanov <nikita@compulab.co.il> wrote:
>>>>>
>>>>>
>>>>> This partial V2 completes the previous partial V2. It contains some
>>>>> final
>>>>> preparational steps, and the introduction of cm-fx6 board.
>>>>>
>>>>> Changes in V2:
>>>>> - Update commit message of "arm: mx6: ddr: configure MMDC for
>>>>> slow_pd"
>>>>> - Remove unnecessary line removal from
>>>>> arch/arm/cpu/armv7/mx6/ddr.c
>>>>> - Move probe_mmdc_config() code straight to dram_init()
>>>>> - Use imx6_spl.h
>>>>> - Use imx_ddr_size()
>>>>> NOTE: the correction of this patch now depends on
>>>>> https://patchwork.ozlabs.org/patch/376095/
>>>>
>>>>
>>>>
>>>> Does this series support the dual core Utilite machine?
>>>
>>>
>>>
>>> It does support dual core, but not the Utilite boot sequence. Right now
>>> you can only boot from MMC because SPL has no fallback functionality and
>>> Utilite always tries MMC first. I'll be sending patches for that after
>>> this series is accepted.
>>>
>>>
>>>> If so I'm not sure how to enable dual core instead of quad core - any
>>>> ideas please?
>>>
>>>
>>>
>>> You don't need to do anything to run this on dual core. ...or am I
>>> misunderstanding your question?
>>
>>
>> I'm not sure. It was failing to boot from SD and I thought that might
>> be the problems, since I see quite a few CPU-related configs in the
>> board config file. Is there a canonical description of how to making a
>> boot image and put it on SD? Perhaps I was doing that incorrectly.
>
>
> You can use the article from the Compulab wiki:
>
> http://compulab.co.il/workspace/mediawiki/index.php5/CM-FX6:_U-Boot:_Creating_a_bootable_SD_card
>
> This article assumes that both SPL and U-Boot reside on a single
> binary at the right offsets. The following article describes the
> steps for creating this joined image:
>
> http://compulab.co.il/workspace/mediawiki/index.php5/CM-FX6:_U-Boot:_Building_Images#Building_the_firmware_images
Thanks, that works. Somehow I didn't have the two sets of instructions
in one place. I have a few comments on the patches which I will send
separately.
Regards,
Simon
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