[U-Boot] [UBOOT RFC PATCH 10/13] board: ti: DRA7: added USB initializtion code

Kishon Vijay Abraham I
2014-08-22T10:47:11Z

On Tuesday 19 August 2014 09:56 PM, Felipe Balbi wrote:
> On Tue, Aug 19, 2014 at 09:43:48PM +0530, Kishon Vijay Abraham I wrote:
>> Hi Felipe,
>>
>> On Monday 18 August 2014 08:10 PM, Felipe Balbi wrote:
>>> On Mon, Aug 18, 2014 at 07:58:32PM +0530, Kishon Vijay Abraham I wrote:
>>>> Implemented board_usb_init(), board_usb_cleanup() and
>>>> board_usb_gadget_handle_interrupts() in dra7xx board file that
>>>> can be invoked by various gadget drivers.
>>>>
>>>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>>>> ---
>>>> arch/arm/include/asm/arch-omap5/omap.h | 12 ++++
>>>> board/ti/dra7xx/evm.c | 106 +++++++++++++++++++++++++++++++++
>>>> 2 files changed, 118 insertions(+)
>>>>
>>>> diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
>>>> index b9600cf..a2348a2 100644
>>>> --- a/arch/arm/include/asm/arch-omap5/omap.h
>>>> +++ b/arch/arm/include/asm/arch-omap5/omap.h
>>>> @@ -33,6 +33,18 @@
>>>> #define CONTROL_ID_CODE CONTROL_CORE_ID_CODE
>>>> #endif
>>>>
>>>> +#ifdef CONFIG_DRA7XX
>>>> +#define DRA7_USB_OTG_SS1_BASE 0x48890000
>>>> +#define DRA7_USB_OTG_SS1_GLUE_BASE 0x48880000
>>>> +#define DRA7_USB3_PHY1_PLL_CTRL 0x4A084C00
>>>> +#define DRA7_USB3_PHY1_POWER 0x4A002370
>>>> +#define DRA7_USB2_PHY1_POWER 0x4A002300
>>>> +
>>>> +#define DRA7_USB_OTG_SS2_BASE 0x488D0000
>>>> +#define DRA7_USB_OTG_SS2_GLUE_BASE 0x488C0000
>>>> +#define DRA7_USB2_PHY2_POWER 0x4A002E74
>>>> +#endif
>>>> +
>>>> /* To be verified */
>>>> #define OMAP5430_CONTROL_ID_CODE_ES1_0 0x0B94202F
>>>> #define OMAP5430_CONTROL_ID_CODE_ES2_0 0x1B94202F
>>>> diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
>>>> index 073d151..0d1b93f 100644
>>>> --- a/board/ti/dra7xx/evm.c
>>>> +++ b/board/ti/dra7xx/evm.c
>>>> @@ -13,10 +13,14 @@
>>>> #include <common.h>
>>>> #include <palmas.h>
>>>> #include <sata.h>
>>>> +#include <usb.h>
>>>> #include <asm/arch/sys_proto.h>
>>>> #include <asm/arch/mmc_host_def.h>
>>>> #include <asm/arch/sata.h>
>>>> #include <environment.h>
>>>> +#include <dwc3-uboot.h>
>>>> +#include <dwc3-omap-uboot.h>
>>>> +#include <ti-usb-phy-uboot.h>
>>>>
>>>> #include "mux_data.h"
>>>>
>>>> @@ -125,6 +129,108 @@ int board_mmc_init(bd_t *bis)
>>>> }
>>>> #endif
>>>>
>>>> +static struct dwc3_device usb_otg_ss1 = {
>>>> + .maximum_speed = USB_SPEED_SUPER,
>>>> + .base = DRA7_USB_OTG_SS1_BASE,
>>>> + .needs_fifo_resize = true,
>>>
>>> make sure this is *really* needed. The only SoC which has needed this
>>> was OMAP5 ES1 due to a nice little "feature" IP folks left in there :-)
>>
>> ah.. "tx-fifo-resize" is set in dra7.dtsi.
>
> hmm, I don't think it needs to be :-) not sure if you remember but early
> OMAP5 samples had a default TX fifo configuration of less than one
> superspeed bulk packet (less than 1024 bytes) :-)

ah.. I remember that one :-D Thankfully you solved it during wakeup ;-)

-Kishon