From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stephen Warren <swarren@wwwdotorg.org>
Date: Wed, 20 Aug 2014 12:12:15 -0600
Subject: [U-Boot] [PATCH 09/23] ARM: tegra: Implement tegra_plle_enable()
In-Reply-To: <1408346196-30419-10-git-send-email-thierry.reding@gmail.com>
References: <1408346196-30419-1-git-send-email-thierry.reding@gmail.com>
	<1408346196-30419-10-git-send-email-thierry.reding@gmail.com>
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On 08/18/2014 01:16 AM, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> This function is required by PCIe and SATA. This patch implements it on
> Tegra20, Tegra30 and Tegra124. It isn't implemented for Tegra114 because
> it doesn't support PCIe or SATA.

I see no issue with the structure of the code so,
Acked-by: Stephen Warren <swarren@nvidia.com>

I know too little about the CAR/PLLE to comment on the actual register 
IO performed here; someone like Peter De Schrijver should review this 
really...