From: Stefan Roese <sr@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 1/2] net: fec_mxc: Adjust RX DMA alignment for mx6solox
Date: Sat, 23 Aug 2014 08:10:19 +0200 [thread overview]
Message-ID: <53F8304B.2080703@denx.de> (raw)
In-Reply-To: <1408736439-3780-1-git-send-email-festevam@gmail.com>
On 22.08.2014 21:40, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
> Other SoCs work with the standard 32 bytes alignment.
>
> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
> which addresses the needs from mx6solox and also works for the other SoCs.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan
prev parent reply other threads:[~2014-08-23 6:10 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-22 19:40 [U-Boot] [PATCH v5 1/2] net: fec_mxc: Adjust RX DMA alignment for mx6solox Fabio Estevam
2014-08-22 19:40 ` [U-Boot] [PATCH v5 2/2] net: fec_mxc: Poll FEC_TBD_READY after polling TDAR Fabio Estevam
2014-08-23 6:10 ` Stefan Roese [this message]
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