From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stefan Roese <sr@denx.de>
Date: Sat, 23 Aug 2014 08:10:19 +0200
Subject: [U-Boot] [PATCH v5 1/2] net: fec_mxc: Adjust RX DMA alignment
	for mx6solox
In-Reply-To: <1408736439-3780-1-git-send-email-festevam@gmail.com>
References: <1408736439-3780-1-git-send-email-festevam@gmail.com>
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On 22.08.2014 21:40, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
> Other SoCs work with the standard 32 bytes alignment.
>
> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
> which addresses the needs from mx6solox and also works for the other SoCs.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Acked-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan