[U-Boot] [PATCH v3 0/5] Introducing the Broadcom Cygnus and NSP boards.

[U-Boot] [PATCH v3 0/5] Introducing the Broadcom Cygnus and NSP boards.

[Steve Rae]

This series adds the bcm958300k and the bcm958622hr boards which
share the iproc architecture code.

Changes in v3:
- remove boards.cfg
- improve error checking of configs
- add required files for Kconfig

Changes in v2:
- remove unused include file
- reformat multi-line comment(s)
- remove deprecated "SZ_" definitions
- remove misc_init_r()
- update CONFIG_ENV_SIZE

Scott Branden (4):
  arm: iproc: Initial commit of iproc architecture code
  arm: bcmcygnus: Add bcmcygnus u-architecture
  arm: bcmnsp: Add bcmnsp u-architecture
  arm: add Cygnus and NSP boards

Steve Rae (1):
  arm: convert Cygnus and NSP boards to Kconfig

 arch/arm/Kconfig                                |   8 ++
 arch/arm/cpu/armv7/Makefile                     |   1 +
 arch/arm/cpu/armv7/bcmcygnus/Makefile           |   7 +
 arch/arm/cpu/armv7/bcmcygnus/reset.c            |  20 +++
 arch/arm/cpu/armv7/bcmnsp/Makefile              |   7 +
 arch/arm/cpu/armv7/bcmnsp/reset.c               |  19 +++
 arch/arm/cpu/armv7/iproc-common/Makefile        |   9 ++
 arch/arm/cpu/armv7/iproc-common/armpll.c        | 170 ++++++++++++++++++++++++
 arch/arm/cpu/armv7/iproc-common/hwinit-common.c |  15 +++
 arch/arm/cpu/armv7/iproc-common/timer.c         | 130 ++++++++++++++++++
 arch/arm/include/asm/arch-bcmcygnus/configs.h   |  25 ++++
 arch/arm/include/asm/arch-bcmnsp/configs.h      |  22 +++
 arch/arm/include/asm/iproc-common/armpll.h      |  14 ++
 arch/arm/include/asm/iproc-common/configs.h     |  20 +++
 arch/arm/include/asm/iproc-common/sysmap.h      |  47 +++++++
 arch/arm/include/asm/iproc-common/timer.h       |  37 ++++++
 board/broadcom/bcm958300k/Kconfig               |  23 ++++
 board/broadcom/bcm958300k/MAINTAINERS           |   6 +
 board/broadcom/bcm958622hr/Kconfig              |  23 ++++
 board/broadcom/bcm958622hr/MAINTAINERS          |   6 +
 board/broadcom/bcm_ep/Makefile                  |   7 +
 board/broadcom/bcm_ep/board.c                   |  55 ++++++++
 configs/bcm958300k_defconfig                    |   3 +
 configs/bcm958622hr_defconfig                   |   3 +
 include/configs/bcm_ep_board.h                  | 115 ++++++++++++++++
 25 files changed, 792 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/bcmcygnus/Makefile
 create mode 100644 arch/arm/cpu/armv7/bcmcygnus/reset.c
 create mode 100644 arch/arm/cpu/armv7/bcmnsp/Makefile
 create mode 100644 arch/arm/cpu/armv7/bcmnsp/reset.c
 create mode 100644 arch/arm/cpu/armv7/iproc-common/Makefile
 create mode 100644 arch/arm/cpu/armv7/iproc-common/armpll.c
 create mode 100644 arch/arm/cpu/armv7/iproc-common/hwinit-common.c
 create mode 100644 arch/arm/cpu/armv7/iproc-common/timer.c
 create mode 100644 arch/arm/include/asm/arch-bcmcygnus/configs.h
 create mode 100644 arch/arm/include/asm/arch-bcmnsp/configs.h
 create mode 100644 arch/arm/include/asm/iproc-common/armpll.h
 create mode 100644 arch/arm/include/asm/iproc-common/configs.h
 create mode 100644 arch/arm/include/asm/iproc-common/sysmap.h
 create mode 100644 arch/arm/include/asm/iproc-common/timer.h
 create mode 100644 board/broadcom/bcm958300k/Kconfig
 create mode 100644 board/broadcom/bcm958300k/MAINTAINERS
 create mode 100644 board/broadcom/bcm958622hr/Kconfig
 create mode 100644 board/broadcom/bcm958622hr/MAINTAINERS
 create mode 100644 board/broadcom/bcm_ep/Makefile
 create mode 100644 board/broadcom/bcm_ep/board.c
 create mode 100644 configs/bcm958300k_defconfig
 create mode 100644 configs/bcm958622hr_defconfig
 create mode 100644 include/configs/bcm_ep_board.h

-- 
1.8.5

[U-Boot] [PATCH v3 1/5] arm: iproc: Initial commit of iproc architecture code

[Steve Rae]

From: Scott Branden <sbranden@broadcom.com>

The iproc architecture code is present in several Broadcom
chip architectures, including Cygnus and NSP.

Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
---

Changes in v3: None
Changes in v2:
- remove unused include file

 arch/arm/cpu/armv7/Makefile                     |   1 +
 arch/arm/cpu/armv7/iproc-common/Makefile        |   9 ++
 arch/arm/cpu/armv7/iproc-common/armpll.c        | 170 ++++++++++++++++++++++++
 arch/arm/cpu/armv7/iproc-common/hwinit-common.c |  15 +++
 arch/arm/cpu/armv7/iproc-common/timer.c         | 130 ++++++++++++++++++
 arch/arm/include/asm/iproc-common/armpll.h      |  14 ++
 arch/arm/include/asm/iproc-common/sysmap.h      |  47 +++++++
 arch/arm/include/asm/iproc-common/timer.h       |  37 ++++++
 8 files changed, 423 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/iproc-common/Makefile
 create mode 100644 arch/arm/cpu/armv7/iproc-common/armpll.c
 create mode 100644 arch/arm/cpu/armv7/iproc-common/hwinit-common.c
 create mode 100644 arch/arm/cpu/armv7/iproc-common/timer.c
 create mode 100644 arch/arm/include/asm/iproc-common/armpll.h
 create mode 100644 arch/arm/include/asm/iproc-common/sysmap.h
 create mode 100644 arch/arm/include/asm/iproc-common/timer.h

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 703ce8c..afeed4d 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -28,6 +28,7 @@ ifneq ($(CONFIG_ARMV7_PSCI),)
 obj-y	+= psci.o
 endif
 
+obj-$(CONFIG_IPROC) += iproc-common/
 obj-$(CONFIG_KONA) += kona-common/
 obj-$(CONFIG_OMAP_COMMON) += omap-common/
 obj-$(CONFIG_SYS_ARCH_TIMER) += arch_timer.o
diff --git a/arch/arm/cpu/armv7/iproc-common/Makefile b/arch/arm/cpu/armv7/iproc-common/Makefile
new file mode 100644
index 0000000..c071a17
--- /dev/null
+++ b/arch/arm/cpu/armv7/iproc-common/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright 2014 Broadcom Corporation.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= armpll.o
+obj-y	+= hwinit-common.o
+obj-y	+= timer.o
diff --git a/arch/arm/cpu/armv7/iproc-common/armpll.c b/arch/arm/cpu/armv7/iproc-common/armpll.c
new file mode 100644
index 0000000..49b61bf
--- /dev/null
+++ b/arch/arm/cpu/armv7/iproc-common/armpll.c
@@ -0,0 +1,170 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/iproc-common/armpll.h>
+#include <asm/iproc-common/sysmap.h>
+
+#define NELEMS(x)	(sizeof(x) / sizeof(x[0]))
+
+struct armpll_parameters {
+	unsigned int mode;
+	unsigned int ndiv_int;
+	unsigned int ndiv_frac;
+	unsigned int pdiv;
+	unsigned int freqid;
+};
+
+struct armpll_parameters armpll_clk_tab[] = {
+	{   25, 64,      1, 1, 0},
+	{  100, 64,      1, 1, 2},
+	{  400, 64,      1, 1, 6},
+	{  448, 71, 713050, 1, 6},
+	{  500, 80,      1, 1, 6},
+	{  560, 89, 629145, 1, 6},
+	{  600, 96,      1, 1, 6},
+	{  800, 64,      1, 1, 7},
+	{  896, 71, 713050, 1, 7},
+	{ 1000, 80,      1, 1, 7},
+	{ 1100, 88,      1, 1, 7},
+	{ 1120, 89, 629145, 1, 7},
+	{ 1200, 96,      1, 1, 7},
+};
+
+uint32_t armpll_config(uint32_t clkmhz)
+{
+	uint32_t freqid;
+	uint32_t ndiv_frac;
+	uint32_t pll;
+	uint32_t status = 1;
+	uint32_t timeout_countdown;
+	int i;
+
+	for (i = 0; i < NELEMS(armpll_clk_tab); i++) {
+		if (armpll_clk_tab[i].mode == clkmhz) {
+			status = 0;
+			break;
+		}
+	}
+
+	if (status) {
+		printf("Error: Clock configuration not supported\n");
+		goto armpll_config_done;
+	}
+
+	/* Enable write access */
+	writel(IPROC_REG_WRITE_ACCESS, IHOST_PROC_CLK_WR_ACCESS);
+
+	if (clkmhz == 25)
+		freqid = 0;
+	else
+		freqid = 2;
+
+	/* Bypass ARM clock and run on sysclk */
+	writel(1 << IHOST_PROC_CLK_POLICY_FREQ__PRIV_ACCESS_MODE |
+	       freqid << IHOST_PROC_CLK_POLICY_FREQ__POLICY3_FREQ_R |
+	       freqid << IHOST_PROC_CLK_POLICY_FREQ__POLICY2_FREQ_R |
+	       freqid << IHOST_PROC_CLK_POLICY_FREQ__POLICY1_FREQ_R |
+	       freqid << IHOST_PROC_CLK_POLICY_FREQ__POLICY0_FREQ_R,
+	       IHOST_PROC_CLK_POLICY_FREQ);
+
+	writel(1 << IHOST_PROC_CLK_POLICY_CTL__GO |
+	       1 << IHOST_PROC_CLK_POLICY_CTL__GO_AC,
+	       IHOST_PROC_CLK_POLICY_CTL);
+
+	/* Poll CCU until operation complete */
+	timeout_countdown = 0x100000;
+	while (readl(IHOST_PROC_CLK_POLICY_CTL) &
+	       (1 << IHOST_PROC_CLK_POLICY_CTL__GO)) {
+		timeout_countdown--;
+		if (timeout_countdown == 0) {
+			printf("CCU polling timedout\n");
+			status = 1;
+			goto armpll_config_done;
+		}
+	}
+
+	if (clkmhz == 25 || clkmhz == 100) {
+		status = 0;
+		goto armpll_config_done;
+	}
+
+	/* Now it is safe to program the PLL */
+	pll = readl(IHOST_PROC_CLK_PLLARMB);
+	pll &= ~((1 << IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_WIDTH) - 1);
+	ndiv_frac =
+		((1 << IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_WIDTH) - 1) &
+		 (armpll_clk_tab[i].ndiv_frac <<
+		 IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_R);
+	pll |= ndiv_frac;
+	writel(pll, IHOST_PROC_CLK_PLLARMB);
+
+	writel(1 << IHOST_PROC_CLK_PLLARMA__PLLARM_LOCK |
+	       armpll_clk_tab[i].ndiv_int <<
+			IHOST_PROC_CLK_PLLARMA__PLLARM_NDIV_INT_R |
+	       armpll_clk_tab[i].pdiv <<
+			IHOST_PROC_CLK_PLLARMA__PLLARM_PDIV_R |
+	       1 << IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_RESETB,
+	       IHOST_PROC_CLK_PLLARMA);
+
+	/* Poll ARM PLL Lock until operation complete */
+	timeout_countdown = 0x100000;
+	while (readl(IHOST_PROC_CLK_PLLARMA) &
+	       (1 << IHOST_PROC_CLK_PLLARMA__PLLARM_LOCK)) {
+		timeout_countdown--;
+		if (timeout_countdown == 0) {
+			printf("ARM PLL lock failed\n");
+			status = 1;
+			goto armpll_config_done;
+		}
+	}
+
+	pll = readl(IHOST_PROC_CLK_PLLARMA);
+	pll |= (1 << IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_POST_RESETB);
+	writel(pll, IHOST_PROC_CLK_PLLARMA);
+
+	/* Set the policy */
+	writel(1 << IHOST_PROC_CLK_POLICY_FREQ__PRIV_ACCESS_MODE |
+	       armpll_clk_tab[i].freqid <<
+			IHOST_PROC_CLK_POLICY_FREQ__POLICY3_FREQ_R |
+	       armpll_clk_tab[i].freqid <<
+			IHOST_PROC_CLK_POLICY_FREQ__POLICY2_FREQ_R |
+	       armpll_clk_tab[i].freqid <<
+			IHOST_PROC_CLK_POLICY_FREQ__POLICY1_FREQ_R |
+	       armpll_clk_tab[i+4].freqid <<
+			IHOST_PROC_CLK_POLICY_FREQ__POLICY0_FREQ_R,
+	       IHOST_PROC_CLK_POLICY_FREQ);
+
+	writel(IPROC_CLKCT_HDELAY_SW_EN, IHOST_PROC_CLK_CORE0_CLKGATE);
+	writel(IPROC_CLKCT_HDELAY_SW_EN, IHOST_PROC_CLK_CORE1_CLKGATE);
+	writel(IPROC_CLKCT_HDELAY_SW_EN, IHOST_PROC_CLK_ARM_SWITCH_CLKGATE);
+	writel(IPROC_CLKCT_HDELAY_SW_EN, IHOST_PROC_CLK_ARM_PERIPH_CLKGATE);
+	writel(IPROC_CLKCT_HDELAY_SW_EN, IHOST_PROC_CLK_APB0_CLKGATE);
+
+	writel(1 << IHOST_PROC_CLK_POLICY_CTL__GO |
+	       1 << IHOST_PROC_CLK_POLICY_CTL__GO_AC,
+	       IHOST_PROC_CLK_POLICY_CTL);
+
+	/* Poll CCU until operation complete */
+	timeout_countdown = 0x100000;
+	while (readl(IHOST_PROC_CLK_POLICY_CTL) &
+	       (1 << IHOST_PROC_CLK_POLICY_CTL__GO)) {
+		timeout_countdown--;
+		if (timeout_countdown == 0) {
+			printf("CCU polling failed\n");
+			status = 1;
+			goto armpll_config_done;
+		}
+	}
+
+	status = 0;
+armpll_config_done:
+	/* Disable access to PLL registers */
+	writel(0, IHOST_PROC_CLK_WR_ACCESS);
+
+	return status;
+}
diff --git a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c
new file mode 100644
index 0000000..7131524
--- /dev/null
+++ b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c
@@ -0,0 +1,15 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+	/* Enable D-cache. I-cache is already enabled in start.S */
+	dcache_enable();
+}
+#endif
diff --git a/arch/arm/cpu/armv7/iproc-common/timer.c b/arch/arm/cpu/armv7/iproc-common/timer.c
new file mode 100644
index 0000000..373d8ec
--- /dev/null
+++ b/arch/arm/cpu/armv7/iproc-common/timer.c
@@ -0,0 +1,130 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <div64.h>
+#include <asm/io.h>
+#include <asm/iproc-common/timer.h>
+#include <asm/iproc-common/sysmap.h>
+
+static inline uint64_t timer_global_read(void)
+{
+	uint64_t cur_tick;
+	uint32_t count_h;
+	uint32_t count_l;
+
+	do {
+		count_h = readl(IPROC_PERIPH_GLB_TIM_REG_BASE +
+				TIMER_GLB_HI_OFFSET);
+		count_l = readl(IPROC_PERIPH_GLB_TIM_REG_BASE +
+				TIMER_GLB_LOW_OFFSET);
+		cur_tick = readl(IPROC_PERIPH_GLB_TIM_REG_BASE +
+				 TIMER_GLB_HI_OFFSET);
+	} while (cur_tick != count_h);
+
+	return (cur_tick << 32) + count_l;
+}
+
+void timer_global_init(void)
+{
+	writel(0, IPROC_PERIPH_GLB_TIM_REG_BASE + TIMER_GLB_CTRL_OFFSET);
+	writel(0, IPROC_PERIPH_GLB_TIM_REG_BASE + TIMER_GLB_LOW_OFFSET);
+	writel(0, IPROC_PERIPH_GLB_TIM_REG_BASE + TIMER_GLB_HI_OFFSET);
+	writel(TIMER_GLB_TIM_CTRL_TIM_EN,
+	       IPROC_PERIPH_GLB_TIM_REG_BASE + TIMER_GLB_CTRL_OFFSET);
+}
+
+int timer_init(void)
+{
+	timer_global_init();
+	return 0;
+}
+
+unsigned long get_timer(unsigned long base)
+{
+	uint64_t count;
+	uint64_t ret;
+	uint64_t tim_clk;
+	uint64_t periph_clk;
+
+	count = timer_global_read();
+
+	/* default arm clk is 1GHz, periph_clk=arm_clk/2, tick per msec */
+	periph_clk = 500000;
+	tim_clk = lldiv(periph_clk,
+			(((readl(IPROC_PERIPH_GLB_TIM_REG_BASE +
+				 TIMER_GLB_CTRL_OFFSET) &
+			TIMER_GLB_TIM_CTRL_PRESC_MASK) >> 8) + 1));
+
+	ret = lldiv(count, (uint32_t)tim_clk);
+
+	/* returns msec */
+	return ret - base;
+}
+
+void __udelay(unsigned long usec)
+{
+	uint64_t cur_tick, end_tick;
+	uint64_t tim_clk;
+	uint64_t periph_clk;
+
+	/* default arm clk is 1GHz, periph_clk=arm_clk/2, tick per usec */
+	periph_clk = 500;
+
+	tim_clk = lldiv(periph_clk,
+			(((readl(IPROC_PERIPH_GLB_TIM_REG_BASE +
+				 TIMER_GLB_CTRL_OFFSET) &
+			TIMER_GLB_TIM_CTRL_PRESC_MASK) >> 8) + 1));
+
+	cur_tick = timer_global_read();
+
+	end_tick = tim_clk;
+	end_tick *= usec;
+	end_tick += cur_tick;
+
+	do {
+		cur_tick = timer_global_read();
+
+	} while (cur_tick < end_tick);
+}
+
+void timer_systick_init(uint32_t tick_ms)
+{
+	/* Disable timer and clear interrupt status*/
+	writel(0, IPROC_PERIPH_PVT_TIM_REG_BASE + TIMER_PVT_CTRL_OFFSET);
+	writel(TIMER_PVT_TIM_INT_STATUS_SET,
+	       IPROC_PERIPH_PVT_TIM_REG_BASE + TIMER_PVT_STATUS_OFFSET);
+	writel((PLL_AXI_CLK/1000) * tick_ms,
+	       IPROC_PERIPH_PVT_TIM_REG_BASE + TIMER_PVT_LOAD_OFFSET);
+	writel(TIMER_PVT_TIM_CTRL_INT_EN |
+	       TIMER_PVT_TIM_CTRL_AUTO_RELD |
+	       TIMER_PVT_TIM_CTRL_TIM_EN,
+	       IPROC_PERIPH_PVT_TIM_REG_BASE + TIMER_PVT_CTRL_OFFSET);
+}
+
+void timer_systick_isr(void *data)
+{
+	writel(TIMER_PVT_TIM_INT_STATUS_SET,
+	       IPROC_PERIPH_PVT_TIM_REG_BASE + TIMER_PVT_STATUS_OFFSET);
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value in msec.
+ */
+unsigned long long get_ticks(void)
+{
+	return get_timer(0);
+}
+
+/*
+ * This is used in conjuction with get_ticks, which returns msec as ticks.
+ * Here we just return ticks/sec = msec/sec = 1000
+ */
+ulong get_tbclk(void)
+{
+	return 1000;
+}
diff --git a/arch/arm/include/asm/iproc-common/armpll.h b/arch/arm/include/asm/iproc-common/armpll.h
new file mode 100644
index 0000000..1bee350
--- /dev/null
+++ b/arch/arm/include/asm/iproc-common/armpll.h
@@ -0,0 +1,14 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ARMPLL_H
+#define __ARMPLL_H
+
+#include <linux/types.h>
+
+uint32_t armpll_config(uint32_t clkmhz);
+
+#endif /*__ARMPLL_H */
diff --git a/arch/arm/include/asm/iproc-common/sysmap.h b/arch/arm/include/asm/iproc-common/sysmap.h
new file mode 100644
index 0000000..5766dc9
--- /dev/null
+++ b/arch/arm/include/asm/iproc-common/sysmap.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __SYSMAP_H
+#define __SYSMAP_H
+
+#define IHOST_PROC_CLK_PLLARMA					0X19000C00
+#define IHOST_PROC_CLK_PLLARMB					0X19000C04
+#define IHOST_PROC_CLK_PLLARMA__PLLARM_PDIV_R				24
+
+#define IHOST_PROC_CLK_WR_ACCESS				0X19000000
+#define IHOST_PROC_CLK_POLICY_FREQ				0X19000008
+#define IHOST_PROC_CLK_POLICY_FREQ__PRIV_ACCESS_MODE			31
+#define IHOST_PROC_CLK_POLICY_FREQ__POLICY3_FREQ_R			24
+#define IHOST_PROC_CLK_POLICY_FREQ__POLICY2_FREQ_R			16
+#define IHOST_PROC_CLK_POLICY_FREQ__POLICY1_FREQ_R			 8
+#define IHOST_PROC_CLK_POLICY_CTL				0X1900000C
+#define IHOST_PROC_CLK_POLICY_CTL__GO					 0
+#define IHOST_PROC_CLK_POLICY_CTL__GO_AC				 1
+#define IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_R			 0
+#define IHOST_PROC_CLK_PLLARMB__PLLARM_NDIV_FRAC_WIDTH			20
+#define IHOST_PROC_CLK_PLLARMA__PLLARM_LOCK				28
+#define IHOST_PROC_CLK_POLICY_FREQ__POLICY0_FREQ_R			 0
+#define IHOST_PROC_CLK_PLLARMA__PLLARM_NDIV_INT_R			 8
+#define IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_POST_RESETB			 1
+#define IHOST_PROC_CLK_PLLARMA__PLLARM_SOFT_RESETB			 0
+#define IHOST_PROC_CLK_CORE0_CLKGATE				0X19000200
+#define IHOST_PROC_CLK_CORE1_CLKGATE				0X19000204
+#define IHOST_PROC_CLK_ARM_SWITCH_CLKGATE			0X19000210
+#define IHOST_PROC_CLK_ARM_PERIPH_CLKGATE			0X19000300
+#define IHOST_PROC_CLK_APB0_CLKGATE				0X19000400
+#define IPROC_CLKCT_HDELAY_SW_EN				0x00000303
+
+#define IPROC_REG_WRITE_ACCESS					0x00a5a501
+
+#define IPROC_PERIPH_BASE					0x19020000
+#define IPROC_PERIPH_INT_CTRL_REG_BASE		(IPROC_PERIPH_BASE +  0x100)
+#define IPROC_PERIPH_GLB_TIM_REG_BASE		(IPROC_PERIPH_BASE +  0x200)
+#define IPROC_PERIPH_PVT_TIM_REG_BASE		(IPROC_PERIPH_BASE +  0x600)
+#define IPROC_PERIPH_INT_DISTR_REG_BASE		(IPROC_PERIPH_BASE + 0x1000)
+
+#define PLL_AXI_CLK						0x1DCD6500
+
+#endif /* __SYSMAP_H */
diff --git a/arch/arm/include/asm/iproc-common/timer.h b/arch/arm/include/asm/iproc-common/timer.h
new file mode 100644
index 0000000..2bc2322
--- /dev/null
+++ b/arch/arm/include/asm/iproc-common/timer.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __TIMER_H
+#define __TIMER_H
+
+#include <linux/types.h>
+
+void timer_systick_init(uint32_t tick_ms);
+void timer_global_init(void);
+
+/* ARM A9 Private Timer */
+#define TIMER_PVT_LOAD_OFFSET			0x00000000
+#define TIMER_PVT_COUNTER_OFFSET		0x00000004
+#define TIMER_PVT_CTRL_OFFSET			0x00000008
+#define TIMER_PVT_STATUS_OFFSET			0x0000000C
+#define TIMER_PVT_TIM_CTRL_TIM_EN		0x00000001
+#define TIMER_PVT_TIM_CTRL_AUTO_RELD		0x00000002
+#define TIMER_PVT_TIM_CTRL_INT_EN		0x00000004
+#define TIMER_PVT_TIM_CTRL_PRESC_MASK		0x0000FF00
+#define TIMER_PVT_TIM_INT_STATUS_SET		0x00000001
+
+/* Global timer */
+#define TIMER_GLB_LOW_OFFSET			0x00000000
+#define TIMER_GLB_HI_OFFSET			0x00000004
+#define TIMER_GLB_CTRL_OFFSET			0x00000008
+#define TIMER_GLB_TIM_CTRL_TIM_EN		0x00000001
+#define TIMER_GLB_TIM_CTRL_COMP_EN		0x00000002
+#define TIMER_GLB_TIM_CTRL_INT_EN		0x00000004
+#define TIMER_GLB_TIM_CTRL_AUTO_INC		0x00000008
+#define TIMER_GLB_TIM_CTRL_PRESC_MASK		0x0000FF00
+#define TIMER_GLB_TIM_INT_STATUS_SET		0x00000001
+
+#endif /*__TIMER_H */
-- 
1.8.5

[U-Boot] [PATCH v3 2/5] arm: bcmcygnus: Add bcmcygnus u-architecture

[Steve Rae]

From: Scott Branden <sbranden@broadcom.com>

Base support for the Broadcom Cygnus SoC.
Based on iproc-common and the SoC specific reset function.

Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
---

Changes in v3: None
Changes in v2: None

 arch/arm/cpu/armv7/bcmcygnus/Makefile |  7 +++++++
 arch/arm/cpu/armv7/bcmcygnus/reset.c  | 20 ++++++++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/bcmcygnus/Makefile
 create mode 100644 arch/arm/cpu/armv7/bcmcygnus/reset.c

diff --git a/arch/arm/cpu/armv7/bcmcygnus/Makefile b/arch/arm/cpu/armv7/bcmcygnus/Makefile
new file mode 100644
index 0000000..04afcf9
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcmcygnus/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2014 Broadcom Corporation.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= reset.o
diff --git a/arch/arm/cpu/armv7/bcmcygnus/reset.c b/arch/arm/cpu/armv7/bcmcygnus/reset.c
new file mode 100644
index 0000000..53ecc0c
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcmcygnus/reset.c
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define CRMU_MAIL_BOX1		0x03024028
+#define CRMU_SOFT_RESET_CMD	0xFFFFFFFF
+
+void reset_cpu(ulong ignored)
+{
+	/* Send soft reset command via Mailbox. */
+	writel(CRMU_SOFT_RESET_CMD, CRMU_MAIL_BOX1);
+
+	while (1)
+		;	/* loop forever till reset */
+}
-- 
1.8.5

[U-Boot] [PATCH v3 3/5] arm: bcmnsp: Add bcmnsp u-architecture

[Steve Rae]

From: Scott Branden <sbranden@broadcom.com>

Base support for the Broadcom NSP SoC.
Based on iproc-common and the SoC specific reset function.

Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
---

Changes in v3: None
Changes in v2: None

 arch/arm/cpu/armv7/bcmnsp/Makefile |  7 +++++++
 arch/arm/cpu/armv7/bcmnsp/reset.c  | 19 +++++++++++++++++++
 2 files changed, 26 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/bcmnsp/Makefile
 create mode 100644 arch/arm/cpu/armv7/bcmnsp/reset.c

diff --git a/arch/arm/cpu/armv7/bcmnsp/Makefile b/arch/arm/cpu/armv7/bcmnsp/Makefile
new file mode 100644
index 0000000..04afcf9
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcmnsp/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2014 Broadcom Corporation.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= reset.o
diff --git a/arch/arm/cpu/armv7/bcmnsp/reset.c b/arch/arm/cpu/armv7/bcmnsp/reset.c
new file mode 100644
index 0000000..d79d9aa
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcmnsp/reset.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define CRU_RESET_OFFSET	0x1803F184
+
+void reset_cpu(ulong ignored)
+{
+	/* Reset the cpu by setting software reset request bit */
+	writel(0x1, CRU_RESET_OFFSET);
+
+	while (1)
+		;	/* loop forever till reset */
+}
-- 
1.8.5

[U-Boot] [PATCH v3 4/5] arm: add Cygnus and NSP boards

[Steve Rae]

From: Scott Branden <sbranden@broadcom.com>

The bcm_ep board configuration is used by a number of boards
including Cygnus and NSP.
Add builds for the bcm958300k and the bcm958622hr boards.

Signed-off-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
---

Changes in v3:
- remove boards.cfg
- improve error checking of configs

Changes in v2:
- reformat multi-line comment(s)
- remove deprecated "SZ_" definitions
- remove misc_init_r()
- update CONFIG_ENV_SIZE

 arch/arm/include/asm/arch-bcmcygnus/configs.h |  25 ++++++
 arch/arm/include/asm/arch-bcmnsp/configs.h    |  22 +++++
 arch/arm/include/asm/iproc-common/configs.h   |  20 +++++
 board/broadcom/bcm_ep/Makefile                |   7 ++
 board/broadcom/bcm_ep/board.c                 |  55 ++++++++++++
 include/configs/bcm_ep_board.h                | 115 ++++++++++++++++++++++++++
 6 files changed, 244 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-bcmcygnus/configs.h
 create mode 100644 arch/arm/include/asm/arch-bcmnsp/configs.h
 create mode 100644 arch/arm/include/asm/iproc-common/configs.h
 create mode 100644 board/broadcom/bcm_ep/Makefile
 create mode 100644 board/broadcom/bcm_ep/board.c
 create mode 100644 include/configs/bcm_ep_board.h

diff --git a/arch/arm/include/asm/arch-bcmcygnus/configs.h b/arch/arm/include/asm/arch-bcmcygnus/configs.h
new file mode 100644
index 0000000..5354637
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcmcygnus/configs.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ARCH_CONFIGS_H
+#define __ARCH_CONFIGS_H
+
+#include <asm/iproc-common/configs.h>
+
+/* uArchitecture specifics */
+
+/* Serial Info */
+/* Post pad 3 bytes after each reg addr */
+#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
+#define CONFIG_SYS_NS16550_MEM32
+
+#define CONFIG_SYS_NS16550_CLK		100000000
+#define CONFIG_SYS_NS16550_CLK_DIV	54
+#define CONFIG_SERIAL_MULTI
+#define CONFIG_CONS_INDEX		3
+#define CONFIG_SYS_NS16550_COM3		0x18023000
+
+#endif /* __ARCH_CONFIGS_H */
diff --git a/arch/arm/include/asm/arch-bcmnsp/configs.h b/arch/arm/include/asm/arch-bcmnsp/configs.h
new file mode 100644
index 0000000..786deae
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcmnsp/configs.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __ARCH_CONFIGS_H
+#define __ARCH_CONFIGS_H
+
+#include <asm/iproc-common/configs.h>
+
+/* uArchitecture specifics */
+
+/* Serial Info */
+/* no padding */
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+
+#define CONFIG_SYS_NS16550_CLK		0x03b9aca0
+#define CONFIG_CONS_INDEX		1
+#define CONFIG_SYS_NS16550_COM1		0x18000300
+
+#endif /* __ARCH_CONFIGS_H */
diff --git a/arch/arm/include/asm/iproc-common/configs.h b/arch/arm/include/asm/iproc-common/configs.h
new file mode 100644
index 0000000..c24de1f
--- /dev/null
+++ b/arch/arm/include/asm/iproc-common/configs.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __IPROC_COMMON_CONFIGS_H
+#define __IPROC_COMMON_CONFIGS_H
+
+#include <linux/stringify.h>
+
+/* Architecture, CPU, chip, etc */
+#define CONFIG_IPROC
+#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
+
+/* Memory Info */
+#define CONFIG_SYS_TEXT_BASE		0x61000000
+#define CONFIG_SYS_SDRAM_BASE		0x61000000
+
+#endif /* __IPROC_COMMON_CONFIGS_H */
diff --git a/board/broadcom/bcm_ep/Makefile b/board/broadcom/bcm_ep/Makefile
new file mode 100644
index 0000000..8914e54
--- /dev/null
+++ b/board/broadcom/bcm_ep/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2014 Broadcom Corporation.
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= board.o
diff --git a/board/broadcom/bcm_ep/board.c b/board/broadcom/bcm_ep/board.c
new file mode 100644
index 0000000..e48cd3f
--- /dev/null
+++ b/board/broadcom/bcm_ep/board.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <config.h>
+#include <asm/system.h>
+#include <asm/iproc-common/armpll.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+	/*
+	 * Address of boot parameters passed to kernel
+	 * Use default offset 0x100
+	 */
+	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+	return 0;
+}
+
+/*
+ * dram_init - sets u-boot's idea of sdram size
+ */
+int dram_init(void)
+{
+	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+				    CONFIG_SYS_SDRAM_SIZE);
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+	gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+int board_early_init_f(void)
+{
+	uint32_t status = 0;
+
+	/* Setup PLL if required */
+#if defined(CONFIG_ARMCLK)
+	armpll_config(CONFIG_ARMCLK);
+#endif
+
+	return status;
+}
diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h
new file mode 100644
index 0000000..827844e
--- /dev/null
+++ b/include/configs/bcm_ep_board.h
@@ -0,0 +1,115 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __BCM_EP_BOARD_H
+#define __BCM_EP_BOARD_H
+
+#include <asm/arch/configs.h>
+
+/* Architecture, CPU, chip, etc */
+#define CONFIG_ARMV7
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SYS_GENERIC_BOARD
+
+/*
+ * Memory configuration
+ * (these must be defined elsewhere)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#error	CONFIG_SYS_TEXT_BASE must be defined!
+#endif
+#ifndef CONFIG_SYS_SDRAM_BASE
+#error	CONFIG_SYS_SDRAM_BASE must be defined!
+#endif
+#ifndef CONFIG_SYS_SDRAM_SIZE
+#error	CONFIG_SYS_SDRAM_SIZE must be defined!
+#endif
+
+#define CONFIG_NR_DRAM_BANKS		1
+
+#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
+#define CONFIG_STACKSIZE		(256 * 1024)
+
+/* Some commands use this as the default load address */
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
+
+/* No mtest functions as recommended */
+#undef CONFIG_CMD_MEMORY
+
+/*
+ * This is the initial SP which is used only briefly for relocating the u-boot
+ * image to the top of SDRAM. After relocation u-boot moves the stack to the
+ * proper place.
+ */
+#define CONFIG_SYS_INIT_SP_ADDR		CONFIG_SYS_TEXT_BASE
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Serial Info */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+
+#define CONFIG_BAUDRATE			115200
+
+#define CONFIG_ENV_SIZE			0x2000
+#define CONFIG_ENV_IS_NOWHERE
+
+#define CONFIG_SYS_NO_FLASH	/* Not using NAND/NOR unmanaged flash */
+
+/* console configuration */
+#define CONFIG_SYS_CBSIZE		1024	/* Console buffer size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+			sizeof(CONFIG_SYS_PROMPT) + 16)	/* Printbuffer size */
+#define CONFIG_SYS_MAXARGS		64
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+/*
+ * One partition type must be defined for part.c
+ * This is necessary for the fatls command to work on an SD card
+ * for example.
+ */
+#define CONFIG_DOS_PARTITION
+
+/* version string, parser, etc */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_COMMAND_HISTORY
+#define CONFIG_SYS_LONGHELP
+
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+
+/* Commands */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+
+/* Enable devicetree support */
+#define CONFIG_OF_LIBFDT
+
+/* SHA hashing */
+#define CONFIG_CMD_HASH
+#define CONFIG_HASH_VERIFY
+#define CONFIG_SHA1
+#define CONFIG_SHA256
+
+/* Enable Time Command */
+#define CONFIG_CMD_TIME
+
+#define CONFIG_CMD_BOOTZ
+
+/* Misc utility code */
+#define CONFIG_BOUNCE_BUFFER
+#define CONFIG_CRC32_VERIFY
+
+#endif /* __BCM_EP_BOARD_H */
-- 
1.8.5

[U-Boot] [PATCH v3 5/5] arm: convert Cygnus and NSP boards to Kconfig

[Steve Rae]

Convert the bcm958300k and the bcm958622hr boards from "boards.cfg" to Kconfig.

Signed-off-by: Steve Rae <srae@broadcom.com>
---

Changes in v3:
- add required files for Kconfig

Changes in v2: None

 arch/arm/Kconfig                       |  8 ++++++++
 board/broadcom/bcm958300k/Kconfig      | 23 +++++++++++++++++++++++
 board/broadcom/bcm958300k/MAINTAINERS  |  6 ++++++
 board/broadcom/bcm958622hr/Kconfig     | 23 +++++++++++++++++++++++
 board/broadcom/bcm958622hr/MAINTAINERS |  6 ++++++
 configs/bcm958300k_defconfig           |  3 +++
 configs/bcm958622hr_defconfig          |  3 +++
 7 files changed, 72 insertions(+)
 create mode 100644 board/broadcom/bcm958300k/Kconfig
 create mode 100644 board/broadcom/bcm958300k/MAINTAINERS
 create mode 100644 board/broadcom/bcm958622hr/Kconfig
 create mode 100644 board/broadcom/bcm958622hr/MAINTAINERS
 create mode 100644 configs/bcm958300k_defconfig
 create mode 100644 configs/bcm958622hr_defconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e385eda..f528e0a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -428,6 +428,12 @@ config TARGET_SAMA5D3XEK
 config TARGET_BCM28155_AP
 	bool "Support bcm28155_ap"
 
+config TARGET_BCM958300K
+	bool "Support bcm958300k"
+
+config TARGET_BCM958622HR
+	bool "Support bcm958622hr"
+
 config TARGET_ARNDALE
 	bool "Support arndale"
 
@@ -823,6 +829,8 @@ source "board/bluegiga/apx4devkit/Kconfig"
 source "board/bluewater/snapper9260/Kconfig"
 source "board/boundary/nitrogen6x/Kconfig"
 source "board/broadcom/bcm28155_ap/Kconfig"
+source "board/broadcom/bcm958300k/Kconfig"
+source "board/broadcom/bcm958622hr/Kconfig"
 source "board/buffalo/lsxl/Kconfig"
 source "board/calao/sbc35_a9g20/Kconfig"
 source "board/calao/tny_a9260/Kconfig"
diff --git a/board/broadcom/bcm958300k/Kconfig b/board/broadcom/bcm958300k/Kconfig
new file mode 100644
index 0000000..165cee7
--- /dev/null
+++ b/board/broadcom/bcm958300k/Kconfig
@@ -0,0 +1,23 @@
+if TARGET_BCM958300K
+
+config SYS_CPU
+	string
+	default "armv7"
+
+config SYS_BOARD
+	string
+	default "bcm_ep"
+
+config SYS_VENDOR
+	string
+	default "broadcom"
+
+config SYS_SOC
+	string
+	default "bcmcygnus"
+
+config SYS_CONFIG_NAME
+	string
+	default "bcm_ep_board"
+
+endif
diff --git a/board/broadcom/bcm958300k/MAINTAINERS b/board/broadcom/bcm958300k/MAINTAINERS
new file mode 100644
index 0000000..f75ee6e
--- /dev/null
+++ b/board/broadcom/bcm958300k/MAINTAINERS
@@ -0,0 +1,6 @@
+Broadcom: Cygnus
+M:	Steve Rae <srae@broadcom.com>
+S:	Maintained
+F:	board/broadcom/bcm958300k/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm958300k_defconfig
diff --git a/board/broadcom/bcm958622hr/Kconfig b/board/broadcom/bcm958622hr/Kconfig
new file mode 100644
index 0000000..6d09592
--- /dev/null
+++ b/board/broadcom/bcm958622hr/Kconfig
@@ -0,0 +1,23 @@
+if TARGET_BCM958622HR
+
+config SYS_CPU
+	string
+	default "armv7"
+
+config SYS_BOARD
+	string
+	default "bcm_ep"
+
+config SYS_VENDOR
+	string
+	default "broadcom"
+
+config SYS_SOC
+	string
+	default "bcmnsp"
+
+config SYS_CONFIG_NAME
+	string
+	default "bcm_ep_board"
+
+endif
diff --git a/board/broadcom/bcm958622hr/MAINTAINERS b/board/broadcom/bcm958622hr/MAINTAINERS
new file mode 100644
index 0000000..c34272f
--- /dev/null
+++ b/board/broadcom/bcm958622hr/MAINTAINERS
@@ -0,0 +1,6 @@
+Broadcom: Northstar Plus
+M:	Steve Rae <srae@broadcom.com>
+S:	Maintained
+F:	board/broadcom/bcm958622hr/
+F:	include/configs/bcm_ep_board.h
+F:	configs/bcm958622hr_defconfig
diff --git a/configs/bcm958300k_defconfig b/configs/bcm958300k_defconfig
new file mode 100644
index 0000000..066739d
--- /dev/null
+++ b/configs/bcm958300k_defconfig
@@ -0,0 +1,3 @@
+CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x20000000"
+CONFIG_ARM=y
+CONFIG_TARGET_BCM958300K=y
diff --git a/configs/bcm958622hr_defconfig b/configs/bcm958622hr_defconfig
new file mode 100644
index 0000000..8a45e51
--- /dev/null
+++ b/configs/bcm958622hr_defconfig
@@ -0,0 +1,3 @@
+CONFIG_SYS_EXTRA_OPTIONS="SYS_SDRAM_SIZE=0x01000000"
+CONFIG_ARM=y
+CONFIG_TARGET_BCM958622HR=y
-- 
1.8.5

[U-Boot] [PATCH v3 0/5] Introducing the Broadcom Cygnus and NSP boards.

[Steve Rae]

On 14-08-11 01:58 PM, Steve Rae wrote:
> This series adds the bcm958300k and the bcm958622hr boards which
> share the iproc architecture code.
>
> Changes in v3:
> - remove boards.cfg
> - improve error checking of configs
> - add required files for Kconfig
>
> Changes in v2:
> - remove unused include file
> - reformat multi-line comment(s)
> - remove deprecated "SZ_" definitions
> - remove misc_init_r()
> - update CONFIG_ENV_SIZE
>
> Scott Branden (4):
>    arm: iproc: Initial commit of iproc architecture code
>    arm: bcmcygnus: Add bcmcygnus u-architecture
>    arm: bcmnsp: Add bcmnsp u-architecture
>    arm: add Cygnus and NSP boards
>
> Steve Rae (1):
>    arm: convert Cygnus and NSP boards to Kconfig
>
>   arch/arm/Kconfig                                |   8 ++
>   arch/arm/cpu/armv7/Makefile                     |   1 +
>   arch/arm/cpu/armv7/bcmcygnus/Makefile           |   7 +
>   arch/arm/cpu/armv7/bcmcygnus/reset.c            |  20 +++
>   arch/arm/cpu/armv7/bcmnsp/Makefile              |   7 +
>   arch/arm/cpu/armv7/bcmnsp/reset.c               |  19 +++
>   arch/arm/cpu/armv7/iproc-common/Makefile        |   9 ++
>   arch/arm/cpu/armv7/iproc-common/armpll.c        | 170 ++++++++++++++++++++++++
>   arch/arm/cpu/armv7/iproc-common/hwinit-common.c |  15 +++
>   arch/arm/cpu/armv7/iproc-common/timer.c         | 130 ++++++++++++++++++
>   arch/arm/include/asm/arch-bcmcygnus/configs.h   |  25 ++++
>   arch/arm/include/asm/arch-bcmnsp/configs.h      |  22 +++
>   arch/arm/include/asm/iproc-common/armpll.h      |  14 ++
>   arch/arm/include/asm/iproc-common/configs.h     |  20 +++
>   arch/arm/include/asm/iproc-common/sysmap.h      |  47 +++++++
>   arch/arm/include/asm/iproc-common/timer.h       |  37 ++++++
>   board/broadcom/bcm958300k/Kconfig               |  23 ++++
>   board/broadcom/bcm958300k/MAINTAINERS           |   6 +
>   board/broadcom/bcm958622hr/Kconfig              |  23 ++++
>   board/broadcom/bcm958622hr/MAINTAINERS          |   6 +
>   board/broadcom/bcm_ep/Makefile                  |   7 +
>   board/broadcom/bcm_ep/board.c                   |  55 ++++++++
>   configs/bcm958300k_defconfig                    |   3 +
>   configs/bcm958622hr_defconfig                   |   3 +
>   include/configs/bcm_ep_board.h                  | 115 ++++++++++++++++
>   25 files changed, 792 insertions(+)
>   create mode 100644 arch/arm/cpu/armv7/bcmcygnus/Makefile
>   create mode 100644 arch/arm/cpu/armv7/bcmcygnus/reset.c
>   create mode 100644 arch/arm/cpu/armv7/bcmnsp/Makefile
>   create mode 100644 arch/arm/cpu/armv7/bcmnsp/reset.c
>   create mode 100644 arch/arm/cpu/armv7/iproc-common/Makefile
>   create mode 100644 arch/arm/cpu/armv7/iproc-common/armpll.c
>   create mode 100644 arch/arm/cpu/armv7/iproc-common/hwinit-common.c
>   create mode 100644 arch/arm/cpu/armv7/iproc-common/timer.c
>   create mode 100644 arch/arm/include/asm/arch-bcmcygnus/configs.h
>   create mode 100644 arch/arm/include/asm/arch-bcmnsp/configs.h
>   create mode 100644 arch/arm/include/asm/iproc-common/armpll.h
>   create mode 100644 arch/arm/include/asm/iproc-common/configs.h
>   create mode 100644 arch/arm/include/asm/iproc-common/sysmap.h
>   create mode 100644 arch/arm/include/asm/iproc-common/timer.h
>   create mode 100644 board/broadcom/bcm958300k/Kconfig
>   create mode 100644 board/broadcom/bcm958300k/MAINTAINERS
>   create mode 100644 board/broadcom/bcm958622hr/Kconfig
>   create mode 100644 board/broadcom/bcm958622hr/MAINTAINERS
>   create mode 100644 board/broadcom/bcm_ep/Makefile
>   create mode 100644 board/broadcom/bcm_ep/board.c
>   create mode 100644 configs/bcm958300k_defconfig
>   create mode 100644 configs/bcm958622hr_defconfig
>   create mode 100644 include/configs/bcm_ep_board.h
>

Any chance of getting this in soon?
( we have an upcoming release.... )
Thanks, Steve

[U-Boot] [U-Boot, v3, 1/5] arm: iproc: Initial commit of iproc architecture code

[Tom Rini]

On Mon, Aug 11, 2014 at 01:58:22PM -0700, Steve Rae wrote:

> From: Scott Branden <sbranden@broadcom.com>
> 
> The iproc architecture code is present in several Broadcom
> chip architectures, including Cygnus and NSP.
> 
> Signed-off-by: Scott Branden <sbranden@broadcom.com>
> Signed-off-by: Steve Rae <srae@broadcom.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, v3, 2/5] arm: bcmcygnus: Add bcmcygnus u-architecture

[Tom Rini]

On Mon, Aug 11, 2014 at 01:58:23PM -0700, Steve Rae wrote:

> From: Scott Branden <sbranden@broadcom.com>
> 
> Base support for the Broadcom Cygnus SoC.
> Based on iproc-common and the SoC specific reset function.
> 
> Signed-off-by: Scott Branden <sbranden@broadcom.com>
> Signed-off-by: Steve Rae <srae@broadcom.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, v3, 3/5] arm: bcmnsp: Add bcmnsp u-architecture

[Tom Rini]

On Mon, Aug 11, 2014 at 01:58:24PM -0700, Steve Rae wrote:

> From: Scott Branden <sbranden@broadcom.com>
> 
> Base support for the Broadcom NSP SoC.
> Based on iproc-common and the SoC specific reset function.
> 
> Signed-off-by: Scott Branden <sbranden@broadcom.com>
> Signed-off-by: Steve Rae <srae@broadcom.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot,v3,4/5] arm: add Cygnus and NSP boards

[Tom Rini]

On Mon, Aug 11, 2014 at 01:58:25PM -0700, Steve Rae wrote:

> From: Scott Branden <sbranden@broadcom.com>
> 
> The bcm_ep board configuration is used by a number of boards
> including Cygnus and NSP.
> Add builds for the bcm958300k and the bcm958622hr boards.
> 
> Signed-off-by: Scott Branden <sbranden@broadcom.com>
> Signed-off-by: Steve Rae <srae@broadcom.com>

Applied to u-boot/master, thanks!

-- 
Tom
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[U-Boot] [U-Boot, v3, 5/5] arm: convert Cygnus and NSP boards to Kconfig

[Tom Rini]

On Mon, Aug 11, 2014 at 01:58:26PM -0700, Steve Rae wrote:


> Convert the bcm958300k and the bcm958622hr boards from "boards.cfg" to Kconfig.
> 
> Signed-off-by: Steve Rae <srae@broadcom.com>

Applied to u-boot/master, thanks!

-- 
Tom
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