From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Fri, 5 Sep 2014 09:45:16 -0700
Subject: [U-Boot] [PATCH v6 01/17] arm: ls102xa: Add Freescale LS102xA
 SoC support
In-Reply-To: <20140905082347.10D4B380E22@gemini.denx.de>
References: <1409895853-17736-1-git-send-email-alison.wang@freescale.com>
	<1409895853-17736-2-git-send-email-alison.wang@freescale.com>
	<20140905082347.10D4B380E22@gemini.denx.de>
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On 09/05/2014 01:23 AM, Wolfgang Denk wrote:
> Dear Alison Wang,
> 
> In message <1409895853-17736-2-git-send-email-alison.wang@freescale.com> you wrote:
>>
>> +	unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
>> +
>> +	sys_info->freq_systembus = sysclk;
>> +#ifdef CONFIG_DDR_CLK_FREQ
>> +	sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
>> +#else
>> +	sys_info->freq_ddrbus = sysclk;
>> +#endif
> 
> I think this should be simplified into a
> 
> 	#ifndef CONFIG_DDR_CLK_FREQ
> 	#define CONFIG_DDR_CLK_FREQ	CONFIG_SYS_CLK_FREQ
> 	#endif
> 
> somewhere in a header file, and getting rid of the #ifdef here?
> 

Dear Wolfgang,

I prefer to stay this way. In the past for mpc85xx, DDR clock source could come
from a dedicated clock, or from the system clock. If it comes from the dedicated
clock, different care is needed to calculate the DDR ratio. This SoC may go that
path as well.

York