[U-Boot] [PATCH v7 1/2] net: fec_mxc: Adjust RX DMA alignment for mx6solox

Fabio Estevam
2014-09-03T22:21:33Z

Hi Stefano,

On Mon, Aug 25, 2014 at 1:34 PM, Fabio Estevam
<fabio.estevam@freescale.com> wrote:
> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
> Other SoCs work with the standard 32 bytes alignment.
>
> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
> which addresses the needs from mx6solox and also works for the other SoCs.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Could we have this series applied for 2014.10-rc ?