From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] iMX6: Disable the L2 before chaning the PL310 latency
Date: Tue, 09 Sep 2014 16:31:13 +0200 [thread overview]
Message-ID: <540F0F31.60602@denx.de> (raw)
In-Reply-To: <1408526304-27070-1-git-send-email-Ye.Li@freescale.com>
On 20/08/2014 11:18, Ye.Li wrote:
> From: "Ye.Li" <Ye.Li@freescale.com>
>
> The Latency parameters of PL310 Tag RAM latency control register and
> Data RAM Latency control register are set in L2 cache enable. And
> setting these registers must have PL310 NOT enabled.
>
> But when using Plugin mode boot, the PL310 is enabled by bootrom.
> The patch disables the PL310 before applying this setting.
>
> Signed-off-by: Ye.Li <Ye.Li@freescale.com>
> ---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
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prev parent reply other threads:[~2014-09-09 14:31 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-20 9:18 [U-Boot] [PATCH] iMX6: Disable the L2 before chaning the PL310 latency Ye.Li
2014-08-20 9:48 ` Stefano Babic
2014-09-09 14:31 ` Stefano Babic [this message]
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