From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Tue, 09 Sep 2014 16:53:48 +0200 Subject: [U-Boot] [PATCH 1/2] arm: vf610: lpuart: fix status register handling In-Reply-To: <37a6507d44d4a8fbe1e4cdc924f45309867ba380.1408463429.git.stefan@agner.ch> References: <37a6507d44d4a8fbe1e4cdc924f45309867ba380.1408463429.git.stefan@agner.ch> Message-ID: <540F147C.9040000@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 19/08/2014 17:54, Stefan Agner wrote: > The status register 1 (S1) is not writeable, hence we should not > write it. In order to clear the RDRF flag we only need to read > the data register. > > Also, when stressing U-Boot a lot with serial input, an overflow can > occur which asserts the S1_OR flag (while not asserting the S1_RDRF > flag). To clear this flag we again just need to read the data > register, hence add this flag to the abort conditions for the while > loop. > > Insert a compiler barrier to make sure reading the data register > gets executed after reading the status register. > > Signed-off-by: Stefan Agner > --- Applied to u-boot-imx, thanks! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================