From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Fri, 12 Sep 2014 10:50:58 +0200 Subject: [U-Boot] [PATCH 1/2] SPI: mxc_spi: remove second reset from ECSPI config handler In-Reply-To: <1409561218-30707-2-git-send-email-list-09_u-boot@tqsc.de> References: <1409561218-30707-1-git-send-email-list-09_u-boot@tqsc.de> <1409561218-30707-2-git-send-email-list-09_u-boot@tqsc.de> Message-ID: <5412B3F2.9050800@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Markus, On 01/09/2014 10:46, Markus Niebel wrote: > From: Markus Niebel > > the second reset prevents other registers to be written. > This will prevent to have the correct signal levels for > SCLK before writing to the config reg in spi_xchg_single. > > Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S > > Signed-off-by: Markus Niebel > --- > drivers/spi/mxc_spi.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c > index 2d5f385..6a05d15 100644 > --- a/drivers/spi/mxc_spi.c > +++ b/drivers/spi/mxc_spi.c > @@ -163,9 +163,6 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, > reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_POSTDIV(0x0F)) | > MXC_CSPICTRL_POSTDIV(post_div); > > - /* We need to disable SPI before changing registers */ > - reg_ctrl &= ~MXC_CSPICTRL_EN; > - > if (mode & SPI_CS_HIGH) > ss_pol = 1; > > Acked-by: Stefano Babic Jagannadha, this series is currently assigned to me in patchwork. Should I merge into u-boot-imx or do you prefer to merge the two patches into u-boot-spi ? Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================