From mboxrd@z Thu Jan 1 00:00:00 1970 From: Li Ye-B37916 Date: Fri, 12 Sep 2014 18:29:23 +0800 Subject: [U-Boot] [PATCH v3 1/4] imx: mx6slevk: Add I2C1 support In-Reply-To: <5412C60C.8010005@denx.de> References: <1410405229-12602-1-git-send-email-B37916@freescale.com> <5412C60C.8010005@denx.de> Message-ID: <5412CB03.2010204@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Stefano, On 9/12/2014 6:08 PM, Stefano Babic wrote: > Hi Ye, > > > On 11/09/2014 05:13, Ye.Li wrote: >> Add I2C1 pin and pad settings, and enable the MXC I2C driver. >> > I see two different topics in this patch: > > 1. Add I2C1 pins to mx6sl pins. This is general, and not related to a > specific board. > > 2. Add I2C1 support to 6slevk board, as in subject. > > Please spliut this patch to address ewach related issue. > > Thanks, > Stefano Babic > >> Signed-off-by: Ye.Li >> --- >> Changes since v1: >> - None >> >> Changes since v2: >> - None >> >> arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 5 +++++ >> board/freescale/mx6slevk/mx6slevk.c | 26 ++++++++++++++++++++++++++ >> include/configs/mx6slevk.h | 6 ++++++ >> 3 files changed, 37 insertions(+), 0 deletions(-) >> >> diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h >> index 045ccc4..ac84270 100644 >> --- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h >> +++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h >> @@ -34,5 +34,10 @@ enum { >> MX6_PAD_FEC_REF_CLK__FEC_REF_OUT = IOMUX_PAD(0x424, 0x134, 0x10, 0x000, 0, 0), >> MX6_PAD_FEC_RX_ER__GPIO_4_19 = IOMUX_PAD(0x0428, 0x0138, 5, 0x0000, 0, 0), >> MX6_PAD_FEC_TX_CLK__GPIO_4_21 = IOMUX_PAD(0x0434, 0x0144, 5, 0x0000, 0, 0), >> + >> + MX6_PAD_I2C1_SDA__I2C1_SDA = IOMUX_PAD(0x0450, 0x0160, 0x10, 0x0720, 2, 0), >> + MX6_PAD_I2C1_SDA__GPIO_3_13 = IOMUX_PAD(0x0450, 0x0160, 5, 0x0000, 0, 0), >> + MX6_PAD_I2C1_SCL__I2C1_SCL = IOMUX_PAD(0x044C, 0x015C, 0x10, 0x071C, 2, 0), >> + MX6_PAD_I2C1_SCL__GPIO_3_12 = IOMUX_PAD(0x044C, 0x015C, 5, 0x0000, 0, 0), >> }; >> #endif /* __ASM_ARCH_MX6_MX6SL_PINS_H__ */ >> diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c >> index a990b4c..fedd5c3 100644 >> --- a/board/freescale/mx6slevk/mx6slevk.c >> +++ b/board/freescale/mx6slevk/mx6slevk.c >> @@ -13,12 +13,14 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> #include >> #include >> #include >> +#include >> >> DECLARE_GLOBAL_DATA_PTR; >> >> @@ -37,8 +39,29 @@ DECLARE_GLOBAL_DATA_PTR; >> #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ >> PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) >> >> +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ >> + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ >> + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ >> + PAD_CTL_ODE | PAD_CTL_SRE_FAST) >> + >> #define ETH_PHY_RESET IMX_GPIO_NR(4, 21) >> >> +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) >> + >> +/* I2C1 for PMIC */ >> +struct i2c_pads_info i2c_pad_info0 = { >> + .sda = { >> + .i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC, >> + .gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC, >> + .gp = IMX_GPIO_NR(3, 13), >> + }, >> + .scl = { >> + .i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC, >> + .gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC, >> + .gp = IMX_GPIO_NR(3, 12), >> + }, >> +}; >> + >> int dram_init(void) >> { >> gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); >> @@ -162,6 +185,9 @@ int board_init(void) >> #ifdef CONFIG_FEC_MXC >> setup_fec(); >> #endif >> + >> + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); >> + >> return 0; >> } >> >> diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h >> index 3d05a64..bf5066f 100644 >> --- a/include/configs/mx6slevk.h >> +++ b/include/configs/mx6slevk.h >> @@ -60,6 +60,12 @@ >> #define CONFIG_PHYLIB >> #define CONFIG_PHY_SMSC >> >> +/* I2C Configs */ >> +#define CONFIG_CMD_I2C >> +#define CONFIG_SYS_I2C >> +#define CONFIG_SYS_I2C_MXC >> +#define CONFIG_SYS_I2C_SPEED 100000 >> + >> /* allow to overwrite serial and ethaddr */ >> #define CONFIG_ENV_OVERWRITE >> #define CONFIG_CONS_INDEX 1 >> > I will split this patch to two in v4. Best regards, Ye Li