From: Michal Simek <monstr@monstr.eu>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 27/51] fpga: altera: Clean up the printing and debug
Date: Wed, 24 Sep 2014 14:46:17 +0200 [thread overview]
Message-ID: <5422BD19.2070504@monstr.eu> (raw)
In-Reply-To: <1411305113-11649-1-git-send-email-marex@denx.de>
On 09/21/2014 03:11 PM, Marek Vasut wrote:
> Clean up the printf() statements and get rid of the PRINTF()
> macro by replacing it with debug_cond().
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@altera.com>
> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
> Cc: Tom Rini <trini@ti.com>
> Cc: Wolfgang Denk <wd@denx.de>
> Cc: Pavel Machek <pavel@denx.de>
> ---
> drivers/fpga/altera.c | 117 +++++++++++++++++++++++++-------------------------
> 1 file changed, 58 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
> index 6e34a8e..ed3f0c8 100644
> --- a/drivers/fpga/altera.c
> +++ b/drivers/fpga/altera.c
> @@ -15,14 +15,8 @@
> #include <ACEX1K.h>
> #include <stratixII.h>
>
> -/* Define FPGA_DEBUG to get debug printf's */
> -/* #define FPGA_DEBUG */
> -
> -#ifdef FPGA_DEBUG
> -#define PRINTF(fmt,args...) printf (fmt ,##args)
> -#else
> -#define PRINTF(fmt,args...)
> -#endif
> +/* Define FPGA_DEBUG to 1 to get debug printf's */
> +#define FPGA_DEBUG 0
>
> /* Local Static Functions */
> static int altera_validate (Altera_desc * desc, const char *fn);
> @@ -32,36 +26,39 @@ int altera_load(Altera_desc *desc, const void *buf, size_t bsize)
> {
> int ret_val = FPGA_FAIL; /* assume a failure */
>
> - if (!altera_validate (desc, (char *)__FUNCTION__)) {
> - printf ("%s: Invalid device descriptor\n", __FUNCTION__);
> + if (!altera_validate (desc, (char *)__func__)) {
> + printf("%s: Invalid device descriptor\n", __func__);
> } else {
> switch (desc->family) {
> case Altera_ACEX1K:
> case Altera_CYC2:
> #if defined(CONFIG_FPGA_ACEX1K)
> - PRINTF ("%s: Launching the ACEX1K Loader...\n",
> - __FUNCTION__);
> + debug_cond(FPGA_DEBUG,
> + "%s: Launching the ACEX1K Loader...\n",
> + __func__);
> ret_val = ACEX1K_load (desc, buf, bsize);
> #elif defined(CONFIG_FPGA_CYCLON2)
> - PRINTF ("%s: Launching the CYCLONE II Loader...\n",
> - __FUNCTION__);
> + debug_cond(FPGA_DEBUG,
> + "%s: Launching the CYCLONE II Loader...\n",
> + __func__);
> ret_val = CYC2_load (desc, buf, bsize);
> #else
> - printf ("%s: No support for ACEX1K devices.\n",
> - __FUNCTION__);
> + printf("%s: No support for ACEX1K devices.\n",
> + __func__);
> #endif
> break;
>
> #if defined(CONFIG_FPGA_STRATIX_II)
> case Altera_StratixII:
> - PRINTF ("%s: Launching the Stratix II Loader...\n",
> - __FUNCTION__);
> + debug_cond(FPGA_DEBUG,
> + "%s: Launching the Stratix II Loader...\n",
> + __func__);
> ret_val = StratixII_load (desc, buf, bsize);
> break;
> #endif
> default:
> - printf ("%s: Unsupported family type, %d\n",
> - __FUNCTION__, desc->family);
> + printf("%s: Unsupported family type, %d\n",
> + __func__, desc->family);
> }
> }
>
> @@ -72,31 +69,33 @@ int altera_dump(Altera_desc *desc, const void *buf, size_t bsize)
> {
> int ret_val = FPGA_FAIL; /* assume a failure */
>
> - if (!altera_validate (desc, (char *)__FUNCTION__)) {
> - printf ("%s: Invalid device descriptor\n", __FUNCTION__);
> + if (!altera_validate (desc, (char *)__func__)) {
> + printf("%s: Invalid device descriptor\n", __func__);
> } else {
> switch (desc->family) {
> case Altera_ACEX1K:
> #if defined(CONFIG_FPGA_ACEX)
> - PRINTF ("%s: Launching the ACEX1K Reader...\n",
> - __FUNCTION__);
> + debug_cond(FPGA_DEBUG,
> + "%s: Launching the ACEX1K Reader...\n",
> + __func__);
> ret_val = ACEX1K_dump (desc, buf, bsize);
> #else
> - printf ("%s: No support for ACEX1K devices.\n",
> - __FUNCTION__);
> + printf("%s: No support for ACEX1K devices.\n",
> + __func__);
> #endif
> break;
>
> #if defined(CONFIG_FPGA_STRATIX_II)
> case Altera_StratixII:
> - PRINTF ("%s: Launching the Stratix II Reader...\n",
> - __FUNCTION__);
> + debug_cond(FPGA_DEBUG,
> + "%s: Launching the Stratix II Reader...\n",
> + __func__);
> ret_val = StratixII_dump (desc, buf, bsize);
> break;
> #endif
> default:
> - printf ("%s: Unsupported family type, %d\n",
> - __FUNCTION__, desc->family);
> + printf("%s: Unsupported family type, %d\n",
> + __func__, desc->family);
> }
> }
>
> @@ -107,42 +106,42 @@ int altera_info( Altera_desc *desc )
> {
> int ret_val = FPGA_FAIL;
>
> - if (altera_validate (desc, (char *)__FUNCTION__)) {
> - printf ("Family: \t");
> + if (altera_validate (desc, (char *)__func__)) {
> + printf("Family: \t");
> switch (desc->family) {
> case Altera_ACEX1K:
> - printf ("ACEX1K\n");
> + printf("ACEX1K\n");
> break;
> case Altera_CYC2:
> - printf ("CYCLON II\n");
> + printf("CYCLON II\n");
> break;
> case Altera_StratixII:
> - printf ("Stratix II\n");
> + printf("Stratix II\n");
> break;
> /* Add new family types here */
> default:
> - printf ("Unknown family type, %d\n", desc->family);
> + printf("Unknown family type, %d\n", desc->family);
> }
>
> - printf ("Interface type:\t");
> + printf("Interface type:\t");
> switch (desc->iface) {
> case passive_serial:
> - printf ("Passive Serial (PS)\n");
> + printf("Passive Serial (PS)\n");
> break;
> case passive_parallel_synchronous:
> - printf ("Passive Parallel Synchronous (PPS)\n");
> + printf("Passive Parallel Synchronous (PPS)\n");
> break;
> case passive_parallel_asynchronous:
> - printf ("Passive Parallel Asynchronous (PPA)\n");
> + printf("Passive Parallel Asynchronous (PPA)\n");
> break;
> case passive_serial_asynchronous:
> - printf ("Passive Serial Asynchronous (PSA)\n");
> + printf("Passive Serial Asynchronous (PSA)\n");
> break;
> case altera_jtag_mode: /* Not used */
> - printf ("JTAG Mode\n");
> + printf("JTAG Mode\n");
> break;
> case fast_passive_parallel:
> - printf ("Fast Passive Parallel (FPP)\n");
> + printf("Fast Passive Parallel (FPP)\n");
> break;
> case fast_passive_parallel_security:
> printf
> @@ -150,31 +149,31 @@ int altera_info( Altera_desc *desc )
> break;
> /* Add new interface types here */
> default:
> - printf ("Unsupported interface type, %d\n", desc->iface);
> + printf("Unsupported interface type, %d\n", desc->iface);
> }
>
> printf("Device Size: \t%zd bytes\n"
> - "Cookie: \t0x%x (%d)\n",
> - desc->size, desc->cookie, desc->cookie);
> + "Cookie: \t0x%x (%d)\n",
> + desc->size, desc->cookie, desc->cookie);
>
> if (desc->iface_fns) {
> - printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
> + printf("Device Function Table @ 0x%p\n", desc->iface_fns);
> switch (desc->family) {
> case Altera_ACEX1K:
> case Altera_CYC2:
> #if defined(CONFIG_FPGA_ACEX1K)
> - ACEX1K_info (desc);
> + ACEX1K_info(desc);
> #elif defined(CONFIG_FPGA_CYCLON2)
> - CYC2_info (desc);
> + CYC2_info(desc);
> #else
> /* just in case */
> - printf ("%s: No support for ACEX1K devices.\n",
> - __FUNCTION__);
> + printf("%s: No support for ACEX1K devices.\n",
> + __func__);
> #endif
> break;
> #if defined(CONFIG_FPGA_STRATIX_II)
> case Altera_StratixII:
> - StratixII_info (desc);
> + StratixII_info(desc);
> break;
> #endif
> /* Add new family types here */
> @@ -183,12 +182,12 @@ int altera_info( Altera_desc *desc )
> break;
> }
> } else {
> - printf ("No Device Function Table.\n");
> + printf("No Device Function Table.\n");
> }
>
> ret_val = FPGA_SUCCESS;
> } else {
> - printf ("%s: Invalid device descriptor\n", __FUNCTION__);
> + printf("%s: Invalid device descriptor\n", __func__);
> }
>
> return ret_val;
> @@ -208,17 +207,17 @@ static int altera_validate (Altera_desc * desc, const char *fn)
> if (desc->size) {
> ret_val = true;
> } else {
> - printf ("%s: NULL part size\n", fn);
> + printf("%s: NULL part size\n", fn);
> }
> } else {
> - printf ("%s: Invalid Interface type, %d\n",
> - fn, desc->iface);
> + printf("%s: Invalid Interface type, %d\n",
> + fn, desc->iface);
> }
> } else {
> - printf ("%s: Invalid family type, %d\n", fn, desc->family);
> + printf("%s: Invalid family type, %d\n", fn, desc->family);
> }
> } else {
> - printf ("%s: NULL descriptor!\n", fn);
> + printf("%s: NULL descriptor!\n", fn);
> }
>
> return ret_val;
>
WARNING: space prohibited between function name and open parenthesis '('
#113: FILE: drivers/fpga/altera.c:29:
+ if (!altera_validate (desc, (char *)__func__)) {
WARNING: space prohibited between function name and open parenthesis '('
#165: FILE: drivers/fpga/altera.c:72:
+ if (!altera_validate (desc, (char *)__func__)) {
WARNING: space prohibited between function name and open parenthesis '('
#209: FILE: drivers/fpga/altera.c:109:
+ if (altera_validate (desc, (char *)__func__)) {
WARNING: line over 80 characters
#275: FILE: drivers/fpga/altera.c:160:
+ printf("Device Function Table @ 0x%p\n", desc->iface_fns);
CHECK: Alignment should match open parenthesis
#290: FILE: drivers/fpga/altera.c:171:
+ printf("%s: No support for ACEX1K devices.\n",
+ __func__);
WARNING: line over 80 characters
#330: FILE: drivers/fpga/altera.c:217:
+ printf("%s: Invalid family type, %d\n", fn, desc->family);
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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next prev parent reply other threads:[~2014-09-24 12:46 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-21 12:58 [U-Boot] [PATCH 00/51] arm: socfpga: Usability fixes Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH V2 01/51] net: Remove unused CONFIG_DW_SEARCH_PHY from configs Marek Vasut
2014-10-01 6:50 ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 02/51] net: phy: Cleanup drivers/net/phy/micrel.c Marek Vasut
2014-10-01 6:57 ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 03/51] net: dwc: Fix cache alignment issues Marek Vasut
2014-10-01 7:23 ` Chin Liang See
2014-10-01 11:21 ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 04/51] net: dwc: Make the cache handling less cryptic Marek Vasut
2014-10-01 7:35 ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 05/51] mmc: dw_mmc: cleanups Marek Vasut
2014-10-01 7:40 ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH 06/51] mmc: dw_mmc: Fix cache alignment issue Marek Vasut
2014-10-01 9:45 ` Chin Liang See
2014-10-01 11:30 ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 07/51] tools: socfpga: Add socfpga preloader signing to mkimage Marek Vasut
2014-10-01 10:10 ` Chin Liang See
2014-10-01 11:51 ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 08/51] arm: socfpga: Complete the list of base addresses Marek Vasut
2014-10-01 10:19 ` Chin Liang See
2014-10-01 11:54 ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 09/51] arm: socfpga: Clean up base address file Marek Vasut
2014-10-01 10:30 ` Chin Liang See
2014-09-21 12:58 ` [U-Boot] [PATCH V2 10/51] arm: socfpga: Add watchdog disable for socfpga Marek Vasut
2014-10-01 10:50 ` Chin Liang See
2014-10-01 12:07 ` Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 11/51] arm: socfpga: sysmgr: Clean up system manager Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 12/51] arm: socfpga: clock: Implant order into bit definitions Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 13/51] arm: socfpga: clock: Drop nonsense inlining from clock manager code Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 14/51] arm: socfpga: clock: Add missing stubs into board file Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH V2 15/51] arm: socfpga: clock: Add code to read clock configuration Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 16/51] arm: socfpga: clock: Trim down code duplication Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 17/51] arm: socfpga: clock: Clean up bit definitions Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 18/51] arm: socfpga: clock: Sync with reference code Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 19/51] arm: socfpga: mmc: Pick the clock from clock manager Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 20/51] arm: socfpga: timer: Pull the timer reload value from config file Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 21/51] arm: socfpga: reset: Add EMAC reset functions Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 22/51] arm: socfpga: misc: Add proper ethernet initialization Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 23/51] arm: socfpga: misc: Add SD controller init Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 24/51] arm: socfpga: misc: Align print_cpuinfo() output Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 25/51] arm: socfpga: board: Correctly set ATAG position Marek Vasut
2014-09-21 12:58 ` [U-Boot] [PATCH 26/51] arm: socfpga: board: Align checkboard() output Marek Vasut
2014-09-21 13:11 ` [U-Boot] [PATCH 27/51] fpga: altera: Clean up the printing and debug Marek Vasut
2014-09-24 12:46 ` Michal Simek [this message]
2014-09-24 13:22 ` Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 28/51] fpga: altera: Clean up altera_validate function Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 29/51] fpga: altera: More indentation trimdown Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 30/51] fpga: altera: Move altera_validate to the top Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 31/51] fpga: altera: Make altera_validate return normal values Marek Vasut
2014-09-22 9:16 ` Pavel Machek
2014-09-22 9:36 ` Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 32/51] fpga: altera: Clean up enums in altera.h Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 33/51] fpga: altera: Turn the switches into table lookup Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH V2 34/51] arm: socfpga: fpga: Add SoCFPGA FPGA programming interface Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 35/51] arm: socfpga: reset: Add function to reset FPGA bridges Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 36/51] arm: socfpga: sysmgr: Add FPGA bits into system manager Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 37/51] arm: cache: Add support for write-allocate D-Cache Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 38/51] arm: socfpga: cache: Define cacheline size Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 39/51] arm: socfpga: cache: Enable D-Cache Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 40/51] arm: socfpga: cache: Enable PL310 L2 cache Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 41/51] arm: socfpga: scu: Add SCU register file Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 42/51] arm: socfpga: nic301: Add NIC-301 GPV " Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 43/51] arm: socfpga: pl310: Map SDRAM to 0x0 Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 44/51] arm: socfpga: nic301: Add NIC-301 configuration code Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 45/51] arm: socfpga: Enable DWMMC for SOCFPGA Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 46/51] arm: socfpga: Enable SDMMC boot for SOCFPGA U-Boot Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 47/51] arm: socfpga: Move cache_enable to CPU code Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 48/51] arm: socfpga: Add command to control HPS-FPGA bridges Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 49/51] arm: socfpga: Clean up SoCFPGA configuration Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 50/51] arm: socfpga: Split " Marek Vasut
2014-09-24 14:10 ` Dinh Nguyen
2014-09-24 15:38 ` Pavel Machek
2014-09-25 14:45 ` Marek Vasut
2014-09-25 14:43 ` Marek Vasut
2014-09-21 13:12 ` [U-Boot] [PATCH 51/51] arm: socfpga: Use CMD_FS_GENERIC Marek Vasut
2014-09-24 13:38 ` Michal Simek
2014-09-22 9:13 ` [U-Boot] [PATCH 28/51] fpga: altera: Clean up altera_validate function Pavel Machek
2014-09-23 15:15 ` [U-Boot] [PATCH 00/51] arm: socfpga: Usability fixes Stefan Roese
2014-09-29 11:12 ` Pavel Machek
2014-09-29 22:54 ` Marek Vasut
2014-10-01 6:18 ` Chin Liang See
2014-10-01 11:13 ` Marek Vasut
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