* [U-Boot] [PATCH] powerpc/mpc85xx: Serdes protocol "00" is supported
@ 2014-09-04 16:53 Ebony Zhu
2014-09-25 16:45 ` York Sun
0 siblings, 1 reply; 2+ messages in thread
From: Ebony Zhu @ 2014-09-04 16:53 UTC (permalink / raw)
To: u-boot
"0x00" is a valid serdes protocol for QorIQ parts, and can not be
used to test whether the serdes is enabled or disabled.
Signed-off-by: Ebony Zhu <b45385@freescale.com>
---
arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index d1fc76a..8edf5bb 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -186,11 +186,6 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift)
#endif
cfg = in_be32(&gur->rcwsr[4]) & sd_prctl_mask;
- /* Is serdes enabled at all? */
- if (!cfg) {
- printf("SERDES%d is not enabled\n", sd + 1);
- return 0;
- }
/* Erratum A-007186
* Freescale Scratch Pad Fuse Register n (SFP_FSPFR0)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH] powerpc/mpc85xx: Serdes protocol "00" is supported
2014-09-04 16:53 [U-Boot] [PATCH] powerpc/mpc85xx: Serdes protocol "00" is supported Ebony Zhu
@ 2014-09-25 16:45 ` York Sun
0 siblings, 0 replies; 2+ messages in thread
From: York Sun @ 2014-09-25 16:45 UTC (permalink / raw)
To: u-boot
On 09/04/2014 09:53 AM, Ebony Zhu wrote:
> "0x00" is a valid serdes protocol for QorIQ parts, and can not be
> used to test whether the serdes is enabled or disabled.
>
> Signed-off-by: Ebony Zhu <b45385@freescale.com>
> ---
> arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 5 -----
> 1 file changed, 5 deletions(-)
>
Applied to u-boot-mpc85xx, awaiting upstream.
York
^ permalink raw reply [flat|nested] 2+ messages in thread
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2014-09-04 16:53 [U-Boot] [PATCH] powerpc/mpc85xx: Serdes protocol "00" is supported Ebony Zhu
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