From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Thu, 25 Sep 2014 14:59:06 -0700 Subject: [U-Boot] [PATCH] powerpc/t104xrdb: Disable DTSEC1 and DTSEC2 on T1042RDB In-Reply-To: <1410939532-32152-1-git-send-email-vijay.rai@freescale.com> References: <1410939532-32152-1-git-send-email-vijay.rai@freescale.com> Message-ID: <5424902A.5070300@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 09/17/2014 12:38 AM, Vijay Rai wrote: > As the board was basically designed for T1040RDB so there are 5 DTSEC ports, > DTSEC1 and DTSEC2 are connected to L2 switch and not usable in T1042 mode > only 3 ports DTSEC3 to DTSEC5 are usable > > Signed-off-by: Vijay Rai > Signed-off-by: Priyanka Jain > --- > board/freescale/t104xrdb/eth.c | 2 +- > drivers/net/fm/t1040.c | 15 +++++++++++++++ > 2 files changed, 16 insertions(+), 1 deletion(-) > > diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c > index c8b6c67..f84ee2d 100644 > --- a/board/freescale/t104xrdb/eth.c > +++ b/board/freescale/t104xrdb/eth.c > @@ -47,7 +47,7 @@ int board_eth_init(bd_t *bis) > case PHY_INTERFACE_MODE_SGMII: > /* T1042RDB doesn't supports SGMII on DTSEC1 & DTSEC2 */ > if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i)) > - fm_info_set_phy_address(i, 0); > + fm_disable_port(i); > /* T1042RDB only supports SGMII on DTSEC3 */ > fm_info_set_phy_address(FM1_DTSEC3, > CONFIG_SYS_SGMII1_PHY_ADDR); > diff --git a/drivers/net/fm/t1040.c b/drivers/net/fm/t1040.c > index bcc871d..1e03662 100644 > --- a/drivers/net/fm/t1040.c > +++ b/drivers/net/fm/t1040.c > @@ -10,6 +10,21 @@ > #include > #include > > +u32 port_to_devdisr[] = { > + [FM1_DTSEC1] = FSL_CORENET_DEVDISR2_DTSEC1_1, > + [FM1_DTSEC2] = FSL_CORENET_DEVDISR2_DTSEC1_2, > + [FM1_DTSEC3] = FSL_CORENET_DEVDISR2_DTSEC1_3, > + [FM1_DTSEC4] = FSL_CORENET_DEVDISR2_DTSEC1_4, > + [FM1_DTSEC5] = FSL_CORENET_DEVDISR2_DTSEC1_5, > +}; > + > +void fman_disable_port(enum fm_port port) > +{ > + ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); We declare it as ccsr_gur_t __iomem *gur. > + > + setbits_be32(&gur->devdisr2, port_to_devdisr[port]); I don't see a check for the array. It may be difficult to debug if CONFIG_SYS_NUM_FM1_DTSEC is bigger than the size of port_to_devdisr. York