From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Wed, 22 Oct 2014 10:37:39 +0200 Subject: [U-Boot] [PATCH] mx6sabresd: Add Seiko WVGA panel support In-Reply-To: <1413933293-23139-1-git-send-email-festevam@gmail.com> References: <1413933293-23139-1-git-send-email-festevam@gmail.com> Message-ID: <54476CD3.5060901@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 22/10/2014 01:14, Fabio Estevam wrote: > From: Fabio Estevam > > Add support for the 4.3'' Seiko WVGA parallel display. > > In order to direct the splash screen to the Seiko display: > > => setenv panel SEIKO-WVGA > => save > => reset > > Signed-off-by: Fabio Estevam > --- > board/freescale/mx6sabresd/mx6sabresd.c | 61 +++++++++++++++++++++++++++++++++ > 1 file changed, 61 insertions(+) > > diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c > index 81dcd6e..3d81fff 100644 > --- a/board/freescale/mx6sabresd/mx6sabresd.c > +++ b/board/freescale/mx6sabresd/mx6sabresd.c > @@ -51,6 +51,8 @@ DECLARE_GLOBAL_DATA_PTR; > > #define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL) > > +#define DISP0_PWR_EN IMX_GPIO_NR(1, 21) > + > int dram_init(void) > { > gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); > @@ -141,6 +143,45 @@ iomux_v3_cfg_t const ecspi1_pads[] = { > MX6_PAD_KEY_ROW1__GPIO4_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), > }; > > +static iomux_v3_cfg_t const rgb_pads[] = { > + MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DI0_PIN4__IPU1_DI0_PIN04 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 | MUX_PAD_CTRL(NO_PAD_CTRL), > + MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), > +}; > + > +static void enable_rgb(struct display_info_t const *dev) > +{ > + imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads)); > + gpio_direction_output(DISP0_PWR_EN, 1); > +} > + > static struct i2c_pads_info i2c_pad_info1 = { > .scl = { > .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | I2C_PAD, > @@ -357,6 +398,26 @@ struct display_info_t const displays[] = {{ > .vsync_len = 10, > .sync = FB_SYNC_EXT, > .vmode = FB_VMODE_NONINTERLACED > +} }, { > + .bus = 0, > + .addr = 0, > + .pixfmt = IPU_PIX_FMT_RGB24, > + .detect = NULL, > + .enable = enable_rgb, > + .mode = { > + .name = "SEIKO-WVGA", > + .refresh = 60, > + .xres = 800, > + .yres = 480, > + .pixclock = 29850, > + .left_margin = 89, > + .right_margin = 164, > + .upper_margin = 23, > + .lower_margin = 10, > + .hsync_len = 10, > + .vsync_len = 10, > + .sync = 0, > + .vmode = FB_VMODE_NONINTERLACED > } } }; > size_t display_count = ARRAY_SIZE(displays); > > Acked-by: Stefano Babic Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================