[U-Boot] [PATCH v2 1/3] arm: arch-mx6: typo fixes in crm_regs.h

[Stefano Babic <sbabic@denx.de>]

Hi Soeren,

On 24/10/2014 16:33, Soeren Moch wrote:
> fix typos in video pll related register names and bit defines
> 
> Signed-off-by: Soeren Moch <smoch@web.de>
> ---
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>  arch/arm/include/asm/arch-mx6/crm_regs.h | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
> index e67b5b9..92f9b21 100644
> --- a/arch/arm/include/asm/arch-mx6/crm_regs.h
> +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
> @@ -89,7 +89,7 @@ struct mxc_ccm_reg {
>  	u32 analog_pll_video_tog;
>  	u32 analog_pll_video_num;		/* 0x40b0 */
>  	u32 analog_reserved6[3];
> -	u32 analog_pll_vedio_denon;		/* 0x40c0 */
> +	u32 analog_pll_video_denom;		/* 0x40c0 */

This was fixed by another patch - I drop it here.

>  	u32 analog_reserved7[7];
>  	u32 analog_pll_enet;			/* 0x40e0 */
>  	u32 analog_pll_enet_set;
> @@ -931,10 +931,10 @@ struct mxc_ccm_reg {
>  #define BF_ANADIG_PLL_VIDEO_RSVD0(v)  \
>  	(((v) << 22) & BM_ANADIG_PLL_VIDEO_RSVD0)
>  #define BM_ANADIG_PLL_VIDEO_SSC_EN 0x00200000
> -#define BP_ANADIG_PLL_VIDEO_TEST_DIV_SELECT      19
> -#define BM_ANADIG_PLL_VIDEO_TEST_DIV_SELECT 0x00180000
> -#define BF_ANADIG_PLL_VIDEO_TEST_DIV_SELECT(v)  \
> -	(((v) << 19) & BM_ANADIG_PLL_VIDEO_TEST_DIV_SELECT)
> +#define BP_ANADIG_PLL_VIDEO_POST_DIV_SELECT      19
> +#define BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT 0x00180000
> +#define BF_ANADIG_PLL_VIDEO_POST_DIV_SELECT(v)  \
> +	(((v) << 19) & BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT)
>  #define BM_ANADIG_PLL_VIDEO_PFD_OFFSET_EN 0x00040000
>  #define BM_ANADIG_PLL_VIDEO_DITHER_ENABLE 0x00020000
>  #define BM_ANADIG_PLL_VIDEO_BYPASS 0x00010000
> 


Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic


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