From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Thu, 13 Nov 2014 08:45:31 -0800 Subject: [U-Boot] [PATCH v3 5/5] ARM: ls102xa: Setting device's stream id for SMMUs. In-Reply-To: <1413795650-5531-6-git-send-email-Li.Xiubo@freescale.com> References: <1413795650-5531-1-git-send-email-Li.Xiubo@freescale.com> <1413795650-5531-6-git-send-email-Li.Xiubo@freescale.com> Message-ID: <5464E02B.5010405@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 10/20/2014 02:00 AM, Xiubo Li wrote: > LS1 has 4 SMMUs for address translation of the masters. All the > SMMUs' stream IDs are 8-bit. The address translation depends on the > stream ID of the incoming transaction. > Each master has unique stream ID assigned to it and is configurable > through SCFG registers. The stream ID for the masters is identical > and share the same register field of STREAM ID registers. > > Signed-off-by: Xiubo Li > --- Acked-by: York Sun