[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Fabio Estevam]

From: Fabio Estevam <fabio.estevam@freescale.com>

mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.

Move the configuration to the spl code.

CCM_CCOSR setting is no longer required to get audio functionality in the 
kernel, so remove such setting.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Hi Stefano,

Actually I would like to get rid of mx6sabresd_spl.cfg completely, but when
I tried to remove it, I ended up with SPL not being built.

Any suggestions?

 board/freescale/mx6sabresd/mx6sabresd.c       | 27 +++++++++++++++++++
 board/freescale/mx6sabresd/mx6sabresd_spl.cfg | 38 ---------------------------
 2 files changed, 27 insertions(+), 38 deletions(-)

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 1142e8a..343c3b6 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -729,6 +729,30 @@ static struct mx6_ddr3_cfg mem_ddr = {
 	.trasmin = 3500,
 };
 
+static void ccgr_init(void)
+{
+	struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+	writel(0x00C03F3F, &ccm->CCGR0);
+	writel(0x0030FC03, &ccm->CCGR1);
+	writel(0x0FFFC000, &ccm->CCGR2);
+	writel(0x3FF00000, &ccm->CCGR3);
+	writel(0x00FFF300, &ccm->CCGR4);
+	writel(0x0F0000C3, &ccm->CCGR5);
+	writel(0x000003FF, &ccm->CCGR6);
+}
+
+static void gpr_init(void)
+{
+	struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
+
+	/* enable AXI cache for VDOA/VPU/IPU */
+	writel(0xF00000CF, &iomux->gpr[4]);
+	/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+	writel(0x007F007F, &iomux->gpr[6]);
+	writel(0x007F007F, &iomux->gpr[7]);
+}
+
 /*
  * This section require the differentiation
  * between iMX6 Sabre Families.
@@ -768,6 +792,9 @@ void board_init_f(ulong dummy)
 	/* setup AIPS and disable watchdog */
 	arch_cpu_init();
 
+	ccgr_init();
+	gpr_init();
+
 	/* iomux and setup of i2c */
 	board_early_init_f();
 
diff --git a/board/freescale/mx6sabresd/mx6sabresd_spl.cfg b/board/freescale/mx6sabresd/mx6sabresd_spl.cfg
index 2bf4817..1d031ba 100644
--- a/board/freescale/mx6sabresd/mx6sabresd_spl.cfg
+++ b/board/freescale/mx6sabresd/mx6sabresd_spl.cfg
@@ -18,41 +18,3 @@ IMAGE_VERSION 2
  * spi, sd (the board has no nand neither onenand)
  */
 BOOT_FROM      sd
-
-/*
- * Device Configuration Data (DCD)
- *
- * Each entry must have the format:
- * Addr-type           Address        Value
- *
- * where:
- *      Addr-type register length (1,2 or 4 bytes)
- *      Address   absolute address of the register
- *      value     value to be stored in the register
- */
-
-/* set the default clock gate to save power */
-DATA 4 0x020c4068 0x00C03F3F
-DATA 4 0x020c406c 0x0030FC03
-DATA 4 0x020c4070 0x0FFFC000
-DATA 4 0x020c4074 0x3FF00000
-DATA 4 0x020c4078 0x00FFF300
-DATA 4 0x020c407c 0x0F0000C3
-DATA 4 0x020c4080 0x000003FF
-
-/* enable AXI cache for VDOA/VPU/IPU */
-DATA 4 0x020e0010 0xF00000CF
-/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
-DATA 4 0x020e0018 0x007F007F
-DATA 4 0x020e001c 0x007F007F
-
-/*
- * Setup CCM_CCOSR register as follows:
- *
- * cko1_en  = 1	   --> CKO1 enabled
- * cko1_div = 111  --> divide by 8
- * cko1_sel = 1011 --> ahb_clk_root
- *
- * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
- */
-DATA 4 0x020c4060 0x000000fb
-- 
1.9.1

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Nikolay Dimitrov]

Hi Fabio,

On 11/13/2014 11:58 PM, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
>
> Move the configuration to the spl code.
>
> CCM_CCOSR setting is no longer required to get audio functionality in the
> kernel, so remove such setting.
>
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

Do you know which kernel versions are compatible with this CCM_CCOSR
change?

Regards,
Nikolay

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Fabio Estevam]

On Thu, Nov 13, 2014 at 8:25 PM, Nikolay Dimitrov <picmaster@mail.bg> wrote:

> Do you know which kernel versions are compatible with this CCM_CCOSR
> change?

Since commit a94f8ecb2f778f92 ("ARM: imx6q: remove board specific CLKO
setup"), which appeared in 3.12, there is no need to set the CCM_CCOSR
register in U-boot.

Regards,

Fabio Estevam

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[John Tobias]

Hi Fabio,

I think it's part of mkimage/Makefile.

I tried to use board/freescale/mx6sabresd/dummy.cfg and the content
was BOOT_FROM sd

It compiles. I guess you need to modify the Makefile in order to get
rid the .cfg file for SPL.

Regards,

john

On Thu, Nov 13, 2014 at 2:30 PM, Fabio Estevam <festevam@gmail.com> wrote:
> On Thu, Nov 13, 2014 at 8:25 PM, Nikolay Dimitrov <picmaster@mail.bg> wrote:
>
>> Do you know which kernel versions are compatible with this CCM_CCOSR
>> change?
>
> Since commit a94f8ecb2f778f92 ("ARM: imx6q: remove board specific CLKO
> setup"), which appeared in 3.12, there is no need to set the CCM_CCOSR
> register in U-boot.
>
> Regards,
>
> Fabio Estevam

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Otavio Salvador]

On Thu, Nov 13, 2014 at 8:30 PM, Fabio Estevam <festevam@gmail.com> wrote:
> On Thu, Nov 13, 2014 at 8:25 PM, Nikolay Dimitrov <picmaster@mail.bg> wrote:
>
>> Do you know which kernel versions are compatible with this CCM_CCOSR
>> change?
>
> Since commit a94f8ecb2f778f92 ("ARM: imx6q: remove board specific CLKO
> setup"), which appeared in 3.12, there is no need to set the CCM_CCOSR
> register in U-boot.

Is this also included in 3.10.17-1.0.x GA BSP? Otherwise we should keep it.

-- 
Otavio Salvador                             O.S. Systems
http://www.ossystems.com.br        http://code.ossystems.com.br
Mobile: +55 (53) 9981-7854            Mobile: +1 (347) 903-9750

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Fabio Estevam]

Hi Otavio,

On Fri, Nov 14, 2014 at 8:17 AM, Otavio Salvador
<otavio@ossystems.com.br> wrote:
> On Thu, Nov 13, 2014 at 8:30 PM, Fabio Estevam <festevam@gmail.com> wrote:
>> On Thu, Nov 13, 2014 at 8:25 PM, Nikolay Dimitrov <picmaster@mail.bg> wrote:
>>
>>> Do you know which kernel versions are compatible with this CCM_CCOSR
>>> change?
>>
>> Since commit a94f8ecb2f778f92 ("ARM: imx6q: remove board specific CLKO
>> setup"), which appeared in 3.12, there is no need to set the CCM_CCOSR
>> register in U-boot.
>
> Is this also included in 3.10.17-1.0.x GA BSP? Otherwise we should keep it.

Please check FSL U-boot:
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/board/freescale/mx6qsabresd/mx6dl_4x_mt41j128.cfg?h=imx_v2013.04_3.10.17_1.0.0_ga

It does not have the CCM_CCOSR settings there as well.

It was only mainline kernel that needed this sometime ago. Currently
it is not needed to have CCM_CCOSR configured in U-boot anymore, which
makes a lot more sense. Now we can safely remove such hack.

Regards,

Fabio Estevam

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Stefano Babic]

Hi Fabio,

On 13/11/2014 22:58, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
> 
> mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
> 
> Move the configuration to the spl code.
> 
> CCM_CCOSR setting is no longer required to get audio functionality in the 
> kernel, so remove such setting.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Hi Stefano,
> 
> Actually I would like to get rid of mx6sabresd_spl.cfg completely, but when
> I tried to remove it, I ended up with SPL not being built.
> 
> Any suggestions?

mkimage is called with the .cfg file, and if it is removed, no imx image
file is generated. I think that then the i.MX cannot boot, because the
resulting image will miss the "magic number" in the headers as described
in manuals. So I think that a minimal .cfg is required (without DCD and
register setting) to let U-Boot build system to generate an imx image file.

Stefano

> 
>  board/freescale/mx6sabresd/mx6sabresd.c       | 27 +++++++++++++++++++
>  board/freescale/mx6sabresd/mx6sabresd_spl.cfg | 38 ---------------------------
>  2 files changed, 27 insertions(+), 38 deletions(-)
> 
> diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
> index 1142e8a..343c3b6 100644
> --- a/board/freescale/mx6sabresd/mx6sabresd.c
> +++ b/board/freescale/mx6sabresd/mx6sabresd.c
> @@ -729,6 +729,30 @@ static struct mx6_ddr3_cfg mem_ddr = {
>  	.trasmin = 3500,
>  };
>  
> +static void ccgr_init(void)
> +{
> +	struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
> +
> +	writel(0x00C03F3F, &ccm->CCGR0);
> +	writel(0x0030FC03, &ccm->CCGR1);
> +	writel(0x0FFFC000, &ccm->CCGR2);
> +	writel(0x3FF00000, &ccm->CCGR3);
> +	writel(0x00FFF300, &ccm->CCGR4);
> +	writel(0x0F0000C3, &ccm->CCGR5);
> +	writel(0x000003FF, &ccm->CCGR6);
> +}
> +
> +static void gpr_init(void)
> +{
> +	struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
> +
> +	/* enable AXI cache for VDOA/VPU/IPU */
> +	writel(0xF00000CF, &iomux->gpr[4]);
> +	/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> +	writel(0x007F007F, &iomux->gpr[6]);
> +	writel(0x007F007F, &iomux->gpr[7]);
> +}
> +
>  /*
>   * This section require the differentiation
>   * between iMX6 Sabre Families.
> @@ -768,6 +792,9 @@ void board_init_f(ulong dummy)
>  	/* setup AIPS and disable watchdog */
>  	arch_cpu_init();
>  
> +	ccgr_init();
> +	gpr_init();
> +
>  	/* iomux and setup of i2c */
>  	board_early_init_f();
>  
> diff --git a/board/freescale/mx6sabresd/mx6sabresd_spl.cfg b/board/freescale/mx6sabresd/mx6sabresd_spl.cfg
> index 2bf4817..1d031ba 100644
> --- a/board/freescale/mx6sabresd/mx6sabresd_spl.cfg
> +++ b/board/freescale/mx6sabresd/mx6sabresd_spl.cfg
> @@ -18,41 +18,3 @@ IMAGE_VERSION 2
>   * spi, sd (the board has no nand neither onenand)
>   */
>  BOOT_FROM      sd
> -
> -/*
> - * Device Configuration Data (DCD)
> - *
> - * Each entry must have the format:
> - * Addr-type           Address        Value
> - *
> - * where:
> - *      Addr-type register length (1,2 or 4 bytes)
> - *      Address   absolute address of the register
> - *      value     value to be stored in the register
> - */
> -
> -/* set the default clock gate to save power */
> -DATA 4 0x020c4068 0x00C03F3F
> -DATA 4 0x020c406c 0x0030FC03
> -DATA 4 0x020c4070 0x0FFFC000
> -DATA 4 0x020c4074 0x3FF00000
> -DATA 4 0x020c4078 0x00FFF300
> -DATA 4 0x020c407c 0x0F0000C3
> -DATA 4 0x020c4080 0x000003FF
> -
> -/* enable AXI cache for VDOA/VPU/IPU */
> -DATA 4 0x020e0010 0xF00000CF
> -/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> -DATA 4 0x020e0018 0x007F007F
> -DATA 4 0x020e001c 0x007F007F
> -
> -/*
> - * Setup CCM_CCOSR register as follows:
> - *
> - * cko1_en  = 1	   --> CKO1 enabled
> - * cko1_div = 111  --> divide by 8
> - * cko1_sel = 1011 --> ahb_clk_root
> - *
> - * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
> - */
> -DATA 4 0x020c4060 0x000000fb
> 

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Fabio Estevam]

On Thu, Nov 13, 2014 at 9:16 PM, Stefano Babic <sbabic@denx.de> wrote:

> mkimage is called with the .cfg file, and if it is removed, no imx image
> file is generated. I think that then the i.MX cannot boot, because the
> resulting image will miss the "magic number" in the headers as described
> in manuals. So I think that a minimal .cfg is required (without DCD and
> register setting) to let U-Boot build system to generate an imx image file.

Got it, so we can keep this minimal .cfg then. After this patch the
spl .cfg it will only contain

IMAGE_VERSION 2
BOOT_FROM sd

Regards,

Fabio Estevam

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Stefano Babic]

Hi Fabio,

On 14/11/2014 00:24, Fabio Estevam wrote:
> On Thu, Nov 13, 2014 at 9:16 PM, Stefano Babic <sbabic@denx.de> wrote:
> 
>> mkimage is called with the .cfg file, and if it is removed, no imx image
>> file is generated. I think that then the i.MX cannot boot, because the
>> resulting image will miss the "magic number" in the headers as described
>> in manuals. So I think that a minimal .cfg is required (without DCD and
>> register setting) to let U-Boot build system to generate an imx image file.
> 
> Got it, so we can keep this minimal .cfg then. After this patch the
> spl .cfg it will only contain
> 
> IMAGE_VERSION 2
> BOOT_FROM sd
> 

Perfect ! I think that other boards can use this minimal setup as well.
What do you think to move it into imx-common ?

Best regards,
Stefano Babic



-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Nikolay Dimitrov]

Hi Fabio,

On 11/13/2014 11:58 PM, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
>
> mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
>
> Move the configuration to the spl code.

I forgot to asker earlier, but what are the benefits of going from DCD 
to SPL code to provide HW initialization?

Regards,
Nikolay

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Fabio Estevam]

Hi Nikolay,

On Fri, Nov 14, 2014 at 9:48 AM, Nikolay Dimitrov <picmaster@mail.bg> wrote:
> Hi Fabio,
>
> On 11/13/2014 11:58 PM, Fabio Estevam wrote:
>>
>> From: Fabio Estevam <fabio.estevam@freescale.com>
>>
>> mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
>>
>> Move the configuration to the spl code.
>
>
> I forgot to asker earlier, but what are the benefits of going from DCD to
> SPL code to provide HW initialization?

We already went through the hard part of removing the DDR settings
from DCD in the SPL case. Now all is left is a few register writes
that could be better placed into SPL code.

Some advantages:

- Shorter and cleaner code - see the stat diff of this series. This
will avoid lots of duplication of the same spl DCD settings for
several boards.
- Do all the register settings in C rather than in a static DCD table.
Easier to maintain and provide future changes.
- We really don't need to do such simple register settings from DCD ;-)

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Nikolay Dimitrov]

Hi Fabio,

On 11/14/2014 01:57 PM, Fabio Estevam wrote:
> Hi Nikolay,
>
> On Fri, Nov 14, 2014 at 9:48 AM, Nikolay Dimitrov <picmaster@mail.bg> wrote:
>> Hi Fabio,
>>
>> On 11/13/2014 11:58 PM, Fabio Estevam wrote:
>>>
>>> From: Fabio Estevam <fabio.estevam@freescale.com>
>>>
>>> mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR.
>>>
>>> Move the configuration to the spl code.
>>
>>
>> I forgot to asker earlier, but what are the benefits of going from DCD to
>> SPL code to provide HW initialization?
>
> We already went through the hard part of removing the DDR settings
> from DCD in the SPL case. Now all is left is a few register writes
> that could be better placed into SPL code.
>
> Some advantages:
>
> - Shorter and cleaner code - see the stat diff of this series. This
> will avoid lots of duplication of the same spl DCD settings for
> several boards.
> - Do all the register settings in C rather than in a static DCD table.
> Easier to maintain and provide future changes.
> - We really don't need to do such simple register settings from DCD ;-)

OK, understood. Thanks,
Nikolay

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Stefano Babic]

Hi Nikolay,

On 14/11/2014 13:22, Nikolay Dimitrov wrote:
> Hi Fabio,
> 
> On 11/14/2014 01:57 PM, Fabio Estevam wrote:
>> Hi Nikolay,
>>
>> On Fri, Nov 14, 2014 at 9:48 AM, Nikolay Dimitrov <picmaster@mail.bg>
>> wrote:
>>> Hi Fabio,
>>>
>>> On 11/13/2014 11:58 PM, Fabio Estevam wrote:
>>>>
>>>> From: Fabio Estevam <fabio.estevam@freescale.com>
>>>>
>>>> mx6sabresd_spl.cfg configures CCM registers, GPR registers and
>>>> CCM_CCOSR.
>>>>
>>>> Move the configuration to the spl code.
>>>
>>>
>>> I forgot to asker earlier, but what are the benefits of going from
>>> DCD to
>>> SPL code to provide HW initialization?
>>
>> We already went through the hard part of removing the DDR settings
>> from DCD in the SPL case. Now all is left is a few register writes
>> that could be better placed into SPL code.
>>
>> Some advantages:
>>
>> - Shorter and cleaner code - see the stat diff of this series. This
>> will avoid lots of duplication of the same spl DCD settings for
>> several boards.
>> - Do all the register settings in C rather than in a static DCD table.
>> Easier to maintain and provide future changes.
>> - We really don't need to do such simple register settings from DCD ;-)
> 

There is another advantage: it is possible to provide a single binary
for boards that can mount different processor,sucs as MX6Q or MX6DL. Due
to different layout, the registers are not the same, and the DCD is, of
course, fix.

With SPL we are able to detect at runtime the SOC and set the registers
consequently. With DCD, we need to rebuild U-Boot and deliver different
binaries - that is also confusing for the end customer.

Best regards,
Stefano Babic

-- 
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH] mx6sabresd: Move the DCD settings to spl code

[Nikolay Dimitrov]

Hi Stefano,

On 11/14/2014 03:23 PM, Stefano Babic wrote:
> Hi Nikolay,
>
> On 14/11/2014 13:22, Nikolay Dimitrov wrote:
>> Hi Fabio,
>>
>> On 11/14/2014 01:57 PM, Fabio Estevam wrote:
>>> Hi Nikolay,
>>>
>>> On Fri, Nov 14, 2014 at 9:48 AM, Nikolay Dimitrov <picmaster@mail.bg>
>>> wrote:
>>>> Hi Fabio,
>>>>
>>>> On 11/13/2014 11:58 PM, Fabio Estevam wrote:
>>>>>
>>>>> From: Fabio Estevam <fabio.estevam@freescale.com>
>>>>>
>>>>> mx6sabresd_spl.cfg configures CCM registers, GPR registers and
>>>>> CCM_CCOSR.
>>>>>
>>>>> Move the configuration to the spl code.
>>>>
>>>>
>>>> I forgot to asker earlier, but what are the benefits of going from
>>>> DCD to
>>>> SPL code to provide HW initialization?
>>>
>>> We already went through the hard part of removing the DDR settings
>>> from DCD in the SPL case. Now all is left is a few register writes
>>> that could be better placed into SPL code.
>>>
>>> Some advantages:
>>>
>>> - Shorter and cleaner code - see the stat diff of this series. This
>>> will avoid lots of duplication of the same spl DCD settings for
>>> several boards.
>>> - Do all the register settings in C rather than in a static DCD table.
>>> Easier to maintain and provide future changes.
>>> - We really don't need to do such simple register settings from DCD ;-)
>>
>
> There is another advantage: it is possible to provide a single binary
> for boards that can mount different processor,sucs as MX6Q or MX6DL. Due
> to different layout, the registers are not the same, and the DCD is, of
> course, fix.
>
> With SPL we are able to detect at runtime the SOC and set the registers
> consequently. With DCD, we need to rebuild U-Boot and deliver different
> binaries - that is also confusing for the end customer.

That was a good addition. Thank you guys for taking the time to explain.

Regards,
Nikolay