* [U-Boot] iMX6 DDR Calibration Value
2014-11-14 1:19 [U-Boot] iMX6 DDR Calibration Value John Tobias
@ 2014-11-14 18:44 ` Fabio Estevam
2014-11-14 20:02 ` John Tobias
2014-11-15 13:22 ` Nikolay Dimitrov
1 sibling, 1 reply; 4+ messages in thread
From: Fabio Estevam @ 2014-11-14 18:44 UTC (permalink / raw)
To: u-boot
On Thu, Nov 13, 2014 at 11:19 PM, John Tobias <john.tobias.ph@gmail.com> wrote:
> Hi Fabio / Stefano,
>
> May be you could help me to get some answer regarding with
> calibrations value for DDR.
>
> I have a 4 custom boards based on iMX6SL (2) Micron DDR and (2) Samsung DDR.
>
> The boards has exact DDR footprints (like density, bus width and so
> on). In fact the uboot that I am using works on both DDR chips.
>
> I re-ran the DDR tools twice for each boards, entered the same
> information. The tools returned different calibration values for each
> boards but, the two results for each boards were the same.
>
>
> e.g: board1
>
> Read DQS Gating calibration
> MPDGCTRL0 PHY0 (0x021b083c) = 0x412C0130
> MPDGCTRL1 PHY0 (0x021b0840) = 0x01140118
>
> Read calibration
> MPRDDLCTL PHY0 (0x021b0848) = 0x3E404244
>
> Write calibration
> MPWRDLCTL PHY0 (0x021b0850) = 0x383C3E36
>
> board2:
>
> Read DQS Gating calibration
> MPDGCTRL0 PHY0 (0x021b083c) = 0x412C0130
> MPDGCTRL1 PHY0 (0x021b0840) = 0x01140118
>
> Read calibration
> MPRDDLCTL PHY0 (0x021b0848) = 0x3E3E4244
>
> Write calibration
> MPWRDLCTL PHY0 (0x021b0850) = 0x383C3E36
>
> Is there any procedures or rules of thumb you follow dealing with the
> calibration settings?.
Then you need to provide a mx6_mmdc_calibration structure for each board, right?
Take a look at gw_ventana_spl.c for an example on how this is done.
Regards,
Fabio Estevam
^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] iMX6 DDR Calibration Value
2014-11-14 1:19 [U-Boot] iMX6 DDR Calibration Value John Tobias
2014-11-14 18:44 ` Fabio Estevam
@ 2014-11-15 13:22 ` Nikolay Dimitrov
1 sibling, 0 replies; 4+ messages in thread
From: Nikolay Dimitrov @ 2014-11-15 13:22 UTC (permalink / raw)
To: u-boot
Hi John,
On 11/14/2014 03:19 AM, John Tobias wrote:
> Hi Fabio / Stefano,
>
> May be you could help me to get some answer regarding with
> calibrations value for DDR.
>
> I have a 4 custom boards based on iMX6SL (2) Micron DDR and (2) Samsung DDR.
>
> The boards has exact DDR footprints (like density, bus width and so
> on). In fact the uboot that I am using works on both DDR chips.
>
> I re-ran the DDR tools twice for each boards, entered the same
> information. The tools returned different calibration values for each
> boards but, the two results for each boards were the same.
>
>
> e.g: board1
>
> Read DQS Gating calibration
> MPDGCTRL0 PHY0 (0x021b083c) = 0x412C0130
> MPDGCTRL1 PHY0 (0x021b0840) = 0x01140118
>
> Read calibration
> MPRDDLCTL PHY0 (0x021b0848) = 0x3E404244
>
> Write calibration
> MPWRDLCTL PHY0 (0x021b0850) = 0x383C3E36
>
> board2:
>
> Read DQS Gating calibration
> MPDGCTRL0 PHY0 (0x021b083c) = 0x412C0130
> MPDGCTRL1 PHY0 (0x021b0840) = 0x01140118
>
> Read calibration
> MPRDDLCTL PHY0 (0x021b0848) = 0x3E3E4244
>
> Write calibration
> MPWRDLCTL PHY0 (0x021b0850) = 0x383C3E36
>
> Is there any procedures or rules of thumb you follow dealing with the
> calibration settings?.
As far as I know, the calibration values are actually settings for the
delay lines, used to align data and clock signals. I can assure you that
each separate imx6 chip, DDR chip, and each board are absolutely uniqie
in their parameters, because there are manufacturing inaccuracies that
can't be avoided. Also the ICs parameters change with temperature, and
the PCB parameters (dielectric permittivity) changes with frequency.
Just think about this - even 2 subsequent runs of DDR stress tester will
return close, but not exactly the same calibration values.
Now, on the positive side, these inaccuracies are not that big and
usually it's quite safe to just perform the calibration with the FSL DDR
stress tool on one of the boards and use these fixed values for all the
boards. This is very easy to be done whem DDR ICs are soldered on the
PCB, and somewhat harder to do when using SO-DIMMS (but I have a
customer board already that's running this way without issues). I can
also confirm that I've personally seen such approach even in automotive
products. What's important is to make sure there are no big changes in
the manufacturing process and components revisions, and that the boards
(especially DDR area) are clean from flux/finger fat.
If I remember correctly, the MMDC module has a mechanism to perform
periodic fine recalibration that handles the slight fluctuations in the
component parameters, while the software is running.
If you are concerned with the temperature stability of your DDR
calibration, you can always do a thermal chamber tests in the full
temperature range of your product, just to be sure.
Hope this helps. Kind regards,
Nikolay
PS: If you need more scientific approach to justify this to someone
else, you can test a representative amount of your product boards,
extract all calibration values, do a chart with normal distribution of
the calibration values and select the values with highest probability.
^ permalink raw reply [flat|nested] 4+ messages in thread