From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Mon, 17 Nov 2014 15:00:42 -0800
Subject: [U-Boot] [PATCH v3 4/8] common: spl: Add interactive DDR
 debugger support for SPL image
In-Reply-To: <1d5a39b148ad4119b71d81e4b4a6e391@BN1PR0301MB0689.namprd03.prod.outlook.com>
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	<20141027102949.413d29ad@lilith>
	<1d5a39b148ad4119b71d81e4b4a6e391@BN1PR0301MB0689.namprd03.prod.outlook.com>
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On 10/27/2014 06:48 PM, Wang Huan-B18965 wrote:
> Hello, Albert,
> 

<snip>
>>> ---
>>> Change log:
>>>  v3: Gave more explaination in the commit.
>>>  v2: No change.
>>
>> This does not apply cleanly. Could you rebase and resubmit?
> [Alison Wang] ok, I will rebase and resubmit the set. Thanks.
> 

Alison,

Where are we on this patch? If you haven't sent an update, I can take this one
and resolve the conflict.

Albert,

This set primarily deals with FSL specific boards. I can take them in if you
don't see any issue with the patches (except the conflicts).

York