* [U-Boot] [PATCH] powerpc/c29xpcie: Add secure boot support
@ 2014-11-25 9:39 Mingkai Hu
2014-11-25 9:43 ` Mingkai.Hu at freescale.com
0 siblings, 1 reply; 6+ messages in thread
From: Mingkai Hu @ 2014-11-25 9:39 UTC (permalink / raw)
To: u-boot
From: Po Liu <Po.Liu@freescale.com>
Add NOR and SPI flash secure boot target for C29XPCIE board.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
---
boards.cfg | 2 ++
include/configs/C29XPCIE.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/boards.cfg b/boards.cfg
index 853446c..b2328ec 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -769,6 +769,8 @@ Active powerpc mpc85xx - freescale bsc9132qds
Active powerpc mpc85xx - freescale c29xpcie C29XPCIE C29XPCIE:C29XPCIE,36BIT Po Liu <po.liu@freescale.com>
Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_NAND C29XPCIE:C29XPCIE,36BIT,NAND Po Liu <po.liu@freescale.com>
Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_SPIFLASH C29XPCIE:C29XPCIE,36BIT,SPIFLASH Po Liu <po.liu@freescale.com>
+Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_SECBOOT C29XPCIE:C29XPCIE,36BIT,SECURE_BOOT Po Liu <po.liu@freescale.com>
+Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_SPIFLASH_SECBOOT C29XPCIE:C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT Po Liu <po.liu@freescale.com>
Active powerpc mpc85xx - freescale corenet_ds P3041DS - -
Active powerpc mpc85xx - freescale corenet_ds P3041DS_NAND P3041DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 -
Active powerpc mpc85xx - freescale corenet_ds P3041DS_SDCARD P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 -
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index be91704..dea6e87 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -576,4 +576,6 @@
#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
+#include <asm/fsl_secure_boot.h>
+
#endif /* __CONFIG_H */
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] powerpc/c29xpcie: Add secure boot support
@ 2014-11-25 9:42 Mingkai Hu
2014-11-25 16:22 ` York Sun
0 siblings, 1 reply; 6+ messages in thread
From: Mingkai Hu @ 2014-11-25 9:42 UTC (permalink / raw)
To: u-boot
From: Po Liu <Po.Liu@freescale.com>
Add NOR and SPI flash secure boot target for C29XPCIE board.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
---
configs/C29XPCIE_NOR_SECBOOT_defconfig | 4 ++++
configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++
include/configs/C29XPCIE.h | 2 ++
3 files changed, 10 insertions(+)
create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig
create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig
new file mode 100644
index 0000000..86751cf
--- /dev/null
+++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
new file mode 100644
index 0000000..d1a42b2
--- /dev/null
+++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
@@ -0,0 +1,4 @@
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 5d11278..1d8dce8 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -579,4 +579,6 @@
#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
+#include <asm/fsl_secure_boot.h>
+
#endif /* __CONFIG_H */
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] powerpc/c29xpcie: Add secure boot support
2014-11-25 9:39 Mingkai Hu
@ 2014-11-25 9:43 ` Mingkai.Hu at freescale.com
0 siblings, 0 replies; 6+ messages in thread
From: Mingkai.Hu at freescale.com @ 2014-11-25 9:43 UTC (permalink / raw)
To: u-boot
Hi all,
Please ignore this email. Sorry for spam email
Thanks,
Mingkai
-----Original Message-----
From: Mingkai Hu [mailto:Mingkai.Hu at freescale.com]
Sent: Tuesday, November 25, 2014 5:40 PM
To: u-boot at lists.denx.de
Cc: Sun York-R58495; Liu Po-B43644; Hu Mingkai-B21284
Subject: [PATCH] powerpc/c29xpcie: Add secure boot support
From: Po Liu <Po.Liu@freescale.com>
Add NOR and SPI flash secure boot target for C29XPCIE board.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
---
boards.cfg | 2 ++
include/configs/C29XPCIE.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/boards.cfg b/boards.cfg
index 853446c..b2328ec 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -769,6 +769,8 @@ Active powerpc mpc85xx - freescale bsc9132qds
Active powerpc mpc85xx - freescale c29xpcie C29XPCIE C29XPCIE:C29XPCIE,36BIT Po Liu <po.liu@freescale.com>
Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_NAND C29XPCIE:C29XPCIE,36BIT,NAND Po Liu <po.liu@freescale.com>
Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_SPIFLASH C29XPCIE:C29XPCIE,36BIT,SPIFLASH Po Liu <po.liu@freescale.com>
+Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_SECBOOT C29XPCIE:C29XPCIE,36BIT,SECURE_BOOT Po Liu <po.liu@freescale.com>
+Active powerpc mpc85xx - freescale c29xpcie C29XPCIE_SPIFLASH_SECBOOT C29XPCIE:C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT Po Liu <po.liu@freescale.com>
Active powerpc mpc85xx - freescale corenet_ds P3041DS - -
Active powerpc mpc85xx - freescale corenet_ds P3041DS_NAND P3041DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000 -
Active powerpc mpc85xx - freescale corenet_ds P3041DS_SDCARD P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000 -
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index be91704..dea6e87 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -576,4 +576,6 @@
#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
+#include <asm/fsl_secure_boot.h>
+
#endif /* __CONFIG_H */
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] powerpc/c29xpcie: Add secure boot support
2014-11-25 9:42 [U-Boot] [PATCH] powerpc/c29xpcie: Add secure boot support Mingkai Hu
@ 2014-11-25 16:22 ` York Sun
2014-11-25 16:40 ` Mingkai.Hu at freescale.com
0 siblings, 1 reply; 6+ messages in thread
From: York Sun @ 2014-11-25 16:22 UTC (permalink / raw)
To: u-boot
On 11/25/2014 01:42 AM, Mingkai Hu wrote:
> From: Po Liu <Po.Liu@freescale.com>
>
> Add NOR and SPI flash secure boot target for C29XPCIE board.
>
> Signed-off-by: Po Liu <Po.Liu@freescale.com>
> Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
> ---
> configs/C29XPCIE_NOR_SECBOOT_defconfig | 4 ++++
> configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++
> include/configs/C29XPCIE.h | 2 ++
> 3 files changed, 10 insertions(+)
> create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig
> create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
>
> diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig
> new file mode 100644
> index 0000000..86751cf
> --- /dev/null
> +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
> @@ -0,0 +1,4 @@
> +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
> +CONFIG_PPC=y
> +CONFIG_MPC85xx=y
> +CONFIG_TARGET_C29XPCIE=y
> diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
> new file mode 100644
> index 0000000..d1a42b2
> --- /dev/null
> +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
> @@ -0,0 +1,4 @@
> +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
> +CONFIG_PPC=y
> +CONFIG_MPC85xx=y
> +CONFIG_TARGET_C29XPCIE=y
> diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
> index 5d11278..1d8dce8 100644
> --- a/include/configs/C29XPCIE.h
> +++ b/include/configs/C29XPCIE.h
> @@ -579,4 +579,6 @@
>
> #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
>
> +#include <asm/fsl_secure_boot.h>
> +
> #endif /* __CONFIG_H */
>
Mingkai,
I see you sent another patch by mistake. You should add a new version number to
this one because their subject are the same.
Please update MAINTAINERS file when you add new targets.
York
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] powerpc/c29xpcie: Add secure boot support
2014-11-25 16:22 ` York Sun
@ 2014-11-25 16:40 ` Mingkai.Hu at freescale.com
2014-11-25 17:19 ` York Sun
0 siblings, 1 reply; 6+ messages in thread
From: Mingkai.Hu at freescale.com @ 2014-11-25 16:40 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: York Sun [mailto:yorksun at freescale.com]
> Sent: Wednesday, November 26, 2014 12:22 AM
> To: Hu Mingkai-B21284; u-boot at lists.denx.de
> Cc: Sun York-R58495; Liu Po-B43644
> Subject: Re: [PATCH] powerpc/c29xpcie: Add secure boot support
>
> On 11/25/2014 01:42 AM, Mingkai Hu wrote:
> > From: Po Liu <Po.Liu@freescale.com>
> >
> > Add NOR and SPI flash secure boot target for C29XPCIE board.
> >
> > Signed-off-by: Po Liu <Po.Liu@freescale.com>
> > Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
> > ---
> > configs/C29XPCIE_NOR_SECBOOT_defconfig | 4 ++++
> > configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++
> > include/configs/C29XPCIE.h | 2 ++
> > 3 files changed, 10 insertions(+)
> > create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig
> > create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
> >
> > diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig
> > b/configs/C29XPCIE_NOR_SECBOOT_defconfig
> > new file mode 100644
> > index 0000000..86751cf
> > --- /dev/null
> > +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
> > @@ -0,0 +1,4 @@
> > +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
> > +CONFIG_PPC=y
> > +CONFIG_MPC85xx=y
> > +CONFIG_TARGET_C29XPCIE=y
> > diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
> > b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
> > new file mode 100644
> > index 0000000..d1a42b2
> > --- /dev/null
> > +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
> > @@ -0,0 +1,4 @@
> > +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
> > +CONFIG_PPC=y
> > +CONFIG_MPC85xx=y
> > +CONFIG_TARGET_C29XPCIE=y
> > diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
> > index 5d11278..1d8dce8 100644
> > --- a/include/configs/C29XPCIE.h
> > +++ b/include/configs/C29XPCIE.h
> > @@ -579,4 +579,6 @@
> >
> > #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
> >
> > +#include <asm/fsl_secure_boot.h>
> > +
> > #endif /* __CONFIG_H */
> >
>
> Mingkai,
>
> I see you sent another patch by mistake. You should add a new version
> number to this one because their subject are the same.
>
> Please update MAINTAINERS file when you add new targets.
>
> York
Hi York,
I will sent version 2 patch.
I didn't find target maintain info in the MAINTAINERS file, it is about sub module maintain info. Do we need to update the MAINTAINERS file for target update?
Thanks,
Mingkai
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] powerpc/c29xpcie: Add secure boot support
2014-11-25 16:40 ` Mingkai.Hu at freescale.com
@ 2014-11-25 17:19 ` York Sun
0 siblings, 0 replies; 6+ messages in thread
From: York Sun @ 2014-11-25 17:19 UTC (permalink / raw)
To: u-boot
On 11/25/2014 08:40 AM, Hu Mingkai-B21284 wrote:
>
>
>> -----Original Message-----
>> From: York Sun [mailto:yorksun at freescale.com]
>> Sent: Wednesday, November 26, 2014 12:22 AM
>> To: Hu Mingkai-B21284; u-boot at lists.denx.de
>> Cc: Sun York-R58495; Liu Po-B43644
>> Subject: Re: [PATCH] powerpc/c29xpcie: Add secure boot support
>>
>> On 11/25/2014 01:42 AM, Mingkai Hu wrote:
>>> From: Po Liu <Po.Liu@freescale.com>
>>>
>>> Add NOR and SPI flash secure boot target for C29XPCIE board.
>>>
>>> Signed-off-by: Po Liu <Po.Liu@freescale.com>
>>> Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
>>> ---
>>> configs/C29XPCIE_NOR_SECBOOT_defconfig | 4 ++++
>>> configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 4 ++++
>>> include/configs/C29XPCIE.h | 2 ++
>>> 3 files changed, 10 insertions(+)
>>> create mode 100644 configs/C29XPCIE_NOR_SECBOOT_defconfig
>>> create mode 100644 configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
>>>
>>> diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig
>>> b/configs/C29XPCIE_NOR_SECBOOT_defconfig
>>> new file mode 100644
>>> index 0000000..86751cf
>>> --- /dev/null
>>> +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
>>> @@ -0,0 +1,4 @@
>>> +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
>>> +CONFIG_PPC=y
>>> +CONFIG_MPC85xx=y
>>> +CONFIG_TARGET_C29XPCIE=y
>>> diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
>>> b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
>>> new file mode 100644
>>> index 0000000..d1a42b2
>>> --- /dev/null
>>> +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
>>> @@ -0,0 +1,4 @@
>>> +CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
>>> +CONFIG_PPC=y
>>> +CONFIG_MPC85xx=y
>>> +CONFIG_TARGET_C29XPCIE=y
>>> diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
>>> index 5d11278..1d8dce8 100644
>>> --- a/include/configs/C29XPCIE.h
>>> +++ b/include/configs/C29XPCIE.h
>>> @@ -579,4 +579,6 @@
>>>
>>> #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
>>>
>>> +#include <asm/fsl_secure_boot.h>
>>> +
>>> #endif /* __CONFIG_H */
>>>
>>
>> Mingkai,
>>
>> I see you sent another patch by mistake. You should add a new version
>> number to this one because their subject are the same.
>>
>> Please update MAINTAINERS file when you add new targets.
>>
>> York
> Hi York,
>
> I will sent version 2 patch.
> I didn't find target maintain info in the MAINTAINERS file, it is about sub module maintain info. Do we need to update the MAINTAINERS file for target update?
>
All you need is to add the new defconfig in board/freescale/c29xpcie/MAINTAINERS.
York
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2014-11-25 17:19 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2014-11-25 9:42 [U-Boot] [PATCH] powerpc/c29xpcie: Add secure boot support Mingkai Hu
2014-11-25 16:22 ` York Sun
2014-11-25 16:40 ` Mingkai.Hu at freescale.com
2014-11-25 17:19 ` York Sun
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2014-11-25 9:39 Mingkai Hu
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