From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Tue, 25 Nov 2014 09:51:14 -0800 Subject: [U-Boot] [PATCH 3/4] arm: ls102xa: Fixed a register definition error In-Reply-To: <1412842298-3257-4-git-send-email-Yuantian.Tang@freescale.com> References: <1412842298-3257-1-git-send-email-Yuantian.Tang@freescale.com> <1412842298-3257-4-git-send-email-Yuantian.Tang@freescale.com> Message-ID: <5474C192.6090100@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 10/09/2014 01:11 AM, Yuantian.Tang at freescale.com wrote: > From: Tang Yuantian > > There are 8 SCFG_SPARECR registers in SCFG memory block, not one. > > Signed-off-by: Tang Yuantian > --- > arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks. York