From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Tue, 25 Nov 2014 09:56:22 -0800
Subject: [U-Boot] [PATCH v2 5/5] arm: ls102xa: Select ge2_clk125 for
 eTSEC clock muxing
In-Reply-To: <1413530796-12881-5-git-send-email-b18965@freescale.com>
References: <1413530796-12881-1-git-send-email-b18965@freescale.com>
	<1413530796-12881-5-git-send-email-b18965@freescale.com>
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On 10/17/2014 12:26 AM, Alison Wang wrote:
> EC1 pins in RCW can be selected as RGMII1, GPIO3, CAN1/2, FTM1 or
> SAI1/2. There is a bug that EC3 RGMII could not work when selecting EC1
> as other functionality except RGMII. The workaround is to select
> ge2_clk125 for eTSEC clock muxing in register SCFG_ETSECCMCR.
> 
> Signed-off-by: Alison Wang <alison.wang@freescale.com>
> ---
> Change log:
>  v2: New patch.
> 
>  board/freescale/ls1021aqds/ls1021aqds.c | 1 +
>  1 file changed, 1 insertion(+)

Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks.

York