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* [U-Boot] [PATCH 0/1] ls1021aqds: add hwconfig setting to do pin mux
@ 2014-10-21  8:34 Yuan Yao
  2014-10-21  8:34 ` [U-Boot] [PATCH] " Yuan Yao
  0 siblings, 1 reply; 3+ messages in thread
From: Yuan Yao @ 2014-10-21  8:34 UTC (permalink / raw)
  To: u-boot


Added in v1: 
- Add pin mux support for ls1021aqds. 

Test log:

U-Boot 2014.07-01993-g052b512-dirty (Oct 20 2014 - 19:58:20)

CPU:   Freescale LayerScape LS1020E, Version: 1.0, (0x87081010)
Clock Configuration:
       CPU0(ARMV7):1000 MHz,
       Bus:300  MHz, DDR:800  MHz (1600 MT/s data rate),
Reset Configuration Word (RCW):
       00000000: 0608000a 00000000 00000000 00000000
       00000010: 60000000 00407900 e0025a00 21046000
       00000020: 00000000 00000000 00000000 00038000
       00000030: 00000000 001b7200 00000000 00000000
Board: LS1021AQDS
vBank: 4
Sys ID:0x2b, Sys Ver: 0x11
FPGA:  v13 (QIXIS_LS1021QDS_2014_08_27_1658), build 65386
I2C:   ready
DRAM:  Initializing DDR....using SPD
Detected UDIMM 18KSF51272AZ-1G6K1
2 GiB (DDR3, 32-bit, CL=11, ECC off)
Using SERDES1 Protocol: 96 (0x60)
Flash: 128 MiB
NAND:  0 MiB
MMC:   FSL_SDHC: 0
In:    serial
Out:   serial
Err:   serial
Net:   eTSEC1 is in sgmii mode
eTSEC2 is in sgmii mode
Phy not found
PHY reset timed out
Phy not found
PHY reset timed out
eTSEC1, eTSEC2, eTSEC3 [PRIME]
=> pri
baudrate=115200
boot=dhcp 82000000 r66431/ls1/uImage.ls1021a; tftp 8f000000 r66431/ls1/ls1021a-qds.dtb; tftp 88000000 r66431/ls1/fsl-image-x11-ls1021aqds-20140424073555.rootfs.ext2.gz.u-boot ; bootm 82000000 88000000 8f000000
boot_bank0=i2c mw 0x66 0x50 0x40;i2c mw 0x66 0x10 0x20;i2c mw 0x66 0x10 0x21
boot_bank4=i2c mw 0x66 0x50 0x44;i2c mw 0x66 0x10 0x20;i2c mw 0x66 0x10 0x21
bootargs=root=/dev/ram0 rw console=ttyS0,115200
bootdelay=3
eth1addr=00:04:9f:03:2e:c5
eth2addr=00:04:9f:03:2e:c6
eth3addr=00:04:9f:03:2e:c7
eth4addr=00:04:9f:03:2e:c8
eth5addr=00:04:9f:03:2e:c9
eth6addr=00:04:9f:03:2e:ca
ethact=eTSEC3
ethaddr=00:04:9f:03:2e:c4
ethprime=eTSEC3
fdt_high=0xffffffff
hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null,ecc=off
initrd_high=0xffffffff
ipaddr=192.168.1.121
loadaddr=0x82000000
scsidevs=0
serverip=192.168.1.1
stderr=serial
stdin=serial
stdout=serial
zhuoboot=tftp 82000000 b46552/ls1021aqds/uImage.ls1021a; tftp 8f000000 b46552/ls1021aqds/ls1021a-qds.dtb;tftp 88000000 b46552/ls1021aqds/ramdisk.small;bootm 82000000 88000000 8f000000

Environment size: 1117/8188 bytes
=> i2c md 0x66 0x5e
005e: 00 00 12 81 f7 ff ff ff ff ef e7 00 3f ff ff ff    ............?...
=> set hwconfig "fsl_ddr:ctlr_intlv=null,bank_intlv=null,ecc=off;sai"
=> save
Saving Environment to Flash...
Un-Protected 1 sectors
Erasing Flash...
. done
Erased 1 sectors
Writing to Flash... 9....8....7....6....5....4....3....2....1....9....8....7....6....5....4....3....2....1....done
Protected 1 sectors
=> run boot_bank4


U-Boot 2014.07-01993-g052b512-dirty (Oct 20 2014 - 19:58:20)

CPU:   Freescale LayerScape LS1020E, Version: 1.0, (0x87081010)
Clock Configuration:
       CPU0(ARMV7):1000 MHz,
       Bus:300  MHz, DDR:800  MHz (1600 MT/s data rate),
Reset Configuration Word (RCW):
       00000000: 0608000a 00000000 00000000 00000000
       00000010: 60000000 00407900 e0025a00 21046000
       00000020: 00000000 00000000 00000000 00038000
       00000030: 00000000 001b7200 00000000 00000000
Board: LS1021AQDS
vBank: 4
Sys ID:0x2b, Sys Ver: 0x11
FPGA:  v13 (QIXIS_LS1021QDS_2014_08_27_1658), build 65386
I2C:   ready
DRAM:  Initializing DDR....using SPD
Detected UDIMM 18KSF51272AZ-1G6K1
2 GiB (DDR3, 32-bit, CL=11, ECC off)
Using SERDES1 Protocol: 96 (0x60)
Flash: 128 MiB
NAND:  0 MiB
MMC:   FSL_SDHC: 0
In:    serial
Out:   serial
Err:   serial
Net:   eTSEC1 is in sgmii mode
eTSEC2 is in sgmii mode
Phy not found
PHY reset timed out
Phy not found
PHY reset timed out
eTSEC1, eTSEC2, eTSEC3 [PRIME]
=> i2c md 0x66 0x5e
005e: 0c 00 12 81 f7 ff ff ff ff ef e7 00 3f ff ff ff    ............?...
=>
[b46683 at rhuath ~]$

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot] [PATCH] ls1021aqds: add hwconfig setting to do pin mux
  2014-10-21  8:34 [U-Boot] [PATCH 0/1] ls1021aqds: add hwconfig setting to do pin mux Yuan Yao
@ 2014-10-21  8:34 ` Yuan Yao
  2014-11-25 21:16   ` York Sun
  0 siblings, 1 reply; 3+ messages in thread
From: Yuan Yao @ 2014-10-21  8:34 UTC (permalink / raw)
  To: u-boot

The Freescale LS1021AQDS share some pins, so Add the hwconfig option
that allows the user to choose which the function he wants.

The main pin mux IP is:
eSDHC, SAI, IIC2, RGMII, CAN, SAI.

Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
---
 board/freescale/ls1021aqds/ls1021aqds.c | 67 ++++++++++++++++++++++++++++++++-
 include/configs/ls1021aqds.h            |  1 +
 2 files changed, 67 insertions(+), 1 deletion(-)

diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 12e83f7..9229151 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -10,6 +10,7 @@
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
+#include <hwconfig.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <fsl_ifc.h>
@@ -20,6 +21,11 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 enum {
+	MUX_TYPE_CAN,
+	MUX_TYPE_IIC2,
+	MUX_TYPE_RGMII,
+	MUX_TYPE_SAI,
+	MUX_TYPE_SDHC,
 	MUX_TYPE_SD_PCI4,
 	MUX_TYPE_SD_PC_SA_SG_SG,
 	MUX_TYPE_SD_PC_SA_PC_SG,
@@ -157,11 +163,27 @@ int board_early_init_f(void)
 
 int config_board_mux(int ctrl_type)
 {
-	u8 reg12;
+	u8 reg12, reg14;
 
 	reg12 = QIXIS_READ(brdcfg[12]);
+	reg14 = QIXIS_READ(brdcfg[14]);
 
 	switch (ctrl_type) {
+	case MUX_TYPE_CAN:
+		reg14 = (reg14 & 0xf0) | 0x03;
+		break;
+	case MUX_TYPE_IIC2:
+		reg14 = (reg14 & 0x0f) | 0xa0;
+		break;
+	case MUX_TYPE_RGMII:
+		reg14 = (reg14 & 0xf0) | 0x0;
+		break;
+	case MUX_TYPE_SAI:
+		reg14 = (reg14 & 0xf0) | 0x0c;
+		break;
+	case MUX_TYPE_SDHC:
+		reg14 = (reg14 & 0x0f) | 0x0;
+		break;
 	case MUX_TYPE_SD_PCI4:
 		reg12 = 0x38;
 		break;
@@ -180,6 +202,7 @@ int config_board_mux(int ctrl_type)
 	}
 
 	QIXIS_WRITE(brdcfg[12], reg12);
+	QIXIS_WRITE(brdcfg[14], reg14);
 
 	return 0;
 }
@@ -213,6 +236,48 @@ int config_serdes_mux(void)
 	return 0;
 }
 
+int misc_init_r(void)
+{
+	int conflict_flag;
+
+	/* some signals can not enable simultaneous*/
+	conflict_flag = 0;
+	if (hwconfig("sdhc"))
+		conflict_flag++;
+	if (hwconfig("iic2"))
+		conflict_flag++;
+	if (conflict_flag > 1) {
+		printf("WARNING: pin conflict !\n");
+		return 0;
+	}
+
+	conflict_flag = 0;
+	if (hwconfig("rgmii"))
+		conflict_flag++;
+	if (hwconfig("can"))
+		conflict_flag++;
+	if (hwconfig("sai"))
+		conflict_flag++;
+	if (conflict_flag > 1) {
+		printf("WARNING: pin conflict !\n");
+		return 0;
+	}
+
+	if (hwconfig("can"))
+		config_board_mux(MUX_TYPE_CAN);
+	else if (hwconfig("rgmii"))
+		config_board_mux(MUX_TYPE_RGMII);
+	else if (hwconfig("sai"))
+		config_board_mux(MUX_TYPE_SAI);
+
+	if (hwconfig("iic2"))
+		config_board_mux(MUX_TYPE_IIC2);
+	else if (hwconfig("sdhc"))
+		config_board_mux(MUX_TYPE_SDHC);
+
+	return 0;
+}
+
 int board_init(void)
 {
 	struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index bb47813..acb2aed 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -326,6 +326,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CMDLINE_EDITING
 #define CONFIG_CMD_IMLS
 
+#define CONFIG_MISC_INIT_R
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE		128
 
-- 
2.1.0.27.g96db324

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [U-Boot] [PATCH] ls1021aqds: add hwconfig setting to do pin mux
  2014-10-21  8:34 ` [U-Boot] [PATCH] " Yuan Yao
@ 2014-11-25 21:16   ` York Sun
  0 siblings, 0 replies; 3+ messages in thread
From: York Sun @ 2014-11-25 21:16 UTC (permalink / raw)
  To: u-boot

On 10/21/2014 01:34 AM, Yuan Yao wrote:
> The Freescale LS1021AQDS share some pins, so Add the hwconfig option
> that allows the user to choose which the function he wants.
> 
> The main pin mux IP is:
> eSDHC, SAI, IIC2, RGMII, CAN, SAI.
> 
> Signed-off-by: Yuan Yao <yao.yuan@freescale.com>
> ---
>  board/freescale/ls1021aqds/ls1021aqds.c | 67 ++++++++++++++++++++++++++++++++-
>  include/configs/ls1021aqds.h            |  1 +
>  2 files changed, 67 insertions(+), 1 deletion(-)
> 

Yuan,

This patch has a conflict. Please rebase to latest u-boot. Thanks.

York

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2014-11-25 21:16 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2014-10-21  8:34 [U-Boot] [PATCH 0/1] ls1021aqds: add hwconfig setting to do pin mux Yuan Yao
2014-10-21  8:34 ` [U-Boot] [PATCH] " Yuan Yao
2014-11-25 21:16   ` York Sun

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