[U-Boot] [PATCH 1/2] sun6i: Update Colombus defconfig settings

[U-Boot] [PATCH 1/2] sun6i: Update Colombus defconfig settings

[Hans de Goede]

The Colombus defconfig settings are missing a number of settings for recently
added features, because we did not know exactly how things were hooked up.

Maxime Ripard has run various tests to get us the necessary details, this
commit updates the defconfig with this info.

This commit also updates the dram clk and zq values with values verified
by Maxime to be the ones used by the original firmware for this board.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 configs/Colombus_defconfig | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig
index 9b4968f..b8c5400 100644
--- a/configs/Colombus_defconfig
+++ b/configs/Colombus_defconfig
@@ -1,9 +1,16 @@
 CONFIG_SPL=y
+CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC"
 CONFIG_FDTFILE="sun6i-a31-colombus.dtb"
-CONFIG_USB_KEYBOARD=n
 +S:CONFIG_ARM=y
 +S:CONFIG_ARCH_SUNXI=y
 +S:CONFIG_MACH_SUN6I=y
 +S:CONFIG_TARGET_COLOMBUS=y
-+S:CONFIG_DRAM_CLK=288
-+S:CONFIG_DRAM_ZQ=379
++S:CONFIG_DRAM_CLK=240
++S:CONFIG_DRAM_ZQ=251
+# Wifi power
++S:CONFIG_AXP221_ALDO1_VOLT=3300
+# HDMI power ?
++S:CONFIG_AXP221_ALDO2_VOLT=1800
++S:CONFIG_AXP221_ALDO3_VOLT=3000
+# No Vbus gpio for usb1
++S:CONFIG_USB1_VBUS_PIN=""
-- 
2.1.0

[U-Boot] [PATCH 2/2] sunxi: mmc: Properly setup mod-clk and clock sampling phases

[Hans de Goede]

The sunxi mmc controller has both an internal clock divider, as well as
the divider in the mod0-clk for the mmc controller.

The internal divider cannot be used, as it conflicts with the setting of
clock sampling phases which is done in the mod0-clk, so it must be set to
0 (divide by 1).

For some reason while the kernel has had this correct from day one, the
u-boot sunxi mmc code has been using a fixed mod0-clk and setting its
internal divider depending on the desired speed. This is something which
we've inherited from the original Allwinner u-boot sources, but while this
has been fixed in Allwinner's own u-boot code at least for the A23 and later
upstream u-boot was still doing this wrong.

This commit fixes this, thereby also fixing mmc support not working reliable
on the A23 (which seems more sensitive to this) and possible also fixes some
other sunxi mmc issues.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 13 ++--
 arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 11 ++--
 drivers/mmc/sunxi_mmc.c                       | 95 +++++++++++++++++++--------
 3 files changed, 83 insertions(+), 36 deletions(-)

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index eb88969..dbc5e58 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -255,11 +255,14 @@ struct sunxi_ccm_reg {
 #define CCM_MBUS_CTRL_CLK_SRC_PLL5 0x2
 #define CCM_MBUS_CTRL_GATE (0x1 << 31)
 
-#define CCM_MMC_CTRL_OSCM24 (0x0 << 24)
-#define CCM_MMC_CTRL_PLL6   (0x1 << 24)
-#define CCM_MMC_CTRL_PLL5   (0x2 << 24)
-
-#define CCM_MMC_CTRL_ENABLE (0x1 << 31)
+#define CCM_MMC_CTRL_M(x)		((x) - 1)
+#define CCM_MMC_CTRL_OCLK_DLY(x)	((x) << 8)
+#define CCM_MMC_CTRL_N(x)		((x) << 16)
+#define CCM_MMC_CTRL_SCLK_DLY(x)	((x) << 20)
+#define CCM_MMC_CTRL_OSCM24		(0x0 << 24)
+#define CCM_MMC_CTRL_PLL6		(0x1 << 24)
+#define CCM_MMC_CTRL_PLL5		(0x2 << 24)
+#define CCM_MMC_CTRL_ENABLE		(0x1 << 31)
 
 #define CCM_DRAM_GATE_OFFSET_DE_BE0	26
 
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index 4bdc0de..3d4fcd1 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -219,10 +219,13 @@ struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_LCD1		5
 #define AHB_GATE_OFFSET_LCD0		4
 
-#define CCM_MMC_CTRL_OSCM24 (0x0 << 24)
-#define CCM_MMC_CTRL_PLL6   (0x1 << 24)
-
-#define CCM_MMC_CTRL_ENABLE (0x1 << 31)
+#define CCM_MMC_CTRL_M(x)		((x) - 1)
+#define CCM_MMC_CTRL_OCLK_DLY(x)	((x) << 8)
+#define CCM_MMC_CTRL_N(x)		((x) << 16)
+#define CCM_MMC_CTRL_SCLK_DLY(x)	((x) << 20)
+#define CCM_MMC_CTRL_OSCM24		(0x0 << 24)
+#define CCM_MMC_CTRL_PLL6		(0x1 << 24)
+#define CCM_MMC_CTRL_ENABLE		(0x1 << 31)
 
 #define CCM_USB_CTRL_PHY1_RST (0x1 << 1)
 #define CCM_USB_CTRL_PHY2_RST (0x1 << 2)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 231f0a0..20d18d0 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -22,7 +22,6 @@ struct sunxi_mmc_host {
 	unsigned mmc_no;
 	uint32_t *mclkreg;
 	unsigned fatal_err;
-	unsigned mod_clk;
 	struct sunxi_mmc *reg;
 	struct mmc_config cfg;
 };
@@ -79,10 +78,63 @@ static int mmc_resource_init(int sdc_no)
 	return ret;
 }
 
+static int mmc_set_mod_clk(struct sunxi_mmc_host *mmchost, unsigned int hz)
+{
+	unsigned int pll, pll_hz, div, n, oclk_dly, sclk_dly;
+
+	if (hz <= 24000000) {
+		pll = CCM_MMC_CTRL_OSCM24;
+		pll_hz = 24000000;
+	} else {
+		pll = CCM_MMC_CTRL_PLL6;
+		pll_hz = clock_get_pll6();
+	}
+
+	div = pll_hz / hz;
+	if (pll_hz % hz)
+		div++;
+
+	n = 0;
+	while (div > 16) {
+		n++;
+		div = (div + 1) / 2;
+	}
+
+	if (n > 3) {
+		printf("mmc %u error cannot set clock to %u\n",
+		       mmchost->mmc_no, hz);
+		return -1;
+	}
+
+	/* determine delays */
+	if (hz <= 400000) {
+		oclk_dly = 0;
+		sclk_dly = 7;
+	} else if (hz <= 25000000) {
+		oclk_dly = 0;
+		sclk_dly = 5;
+	} else if (hz <= 50000000) {
+		oclk_dly = 3;
+		sclk_dly = 5;
+	} else {
+		/* hz > 50000000 */
+		oclk_dly = 2;
+		sclk_dly = 4;
+	}
+
+	writel(CCM_MMC_CTRL_ENABLE | pll | CCM_MMC_CTRL_SCLK_DLY(sclk_dly) |
+	       CCM_MMC_CTRL_N(n) | CCM_MMC_CTRL_OCLK_DLY(oclk_dly) |
+	       CCM_MMC_CTRL_M(div), mmchost->mclkreg);
+
+	debug("mmc %u set mod-clk req %u parent %u n %u m %u rate %u\n",
+	      mmchost->mmc_no, hz, pll_hz, 1u << n, div,
+	      pll_hz / (1u << n) / div);
+
+	return 0;
+}
+
 static int mmc_clk_io_on(int sdc_no)
 {
-	unsigned int pll_clk;
-	unsigned int divider;
 	struct sunxi_mmc_host *mmchost = &mmc_host[sdc_no];
 	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 
@@ -96,15 +148,7 @@ static int mmc_clk_io_on(int sdc_no)
 	setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MMC(sdc_no));
 #endif
 
-	/* config mod clock */
-	pll_clk = clock_get_pll6();
-	/* should be close to 100 MHz but no more, so round up */
-	divider = ((pll_clk + 99999999) / 100000000) - 1;
-	writel(CCM_MMC_CTRL_ENABLE | CCM_MMC_CTRL_PLL6 | divider,
-	       mmchost->mclkreg);
-	mmchost->mod_clk = pll_clk / (divider + 1);
-
-	return 0;
+	return mmc_set_mod_clk(mmchost, 24000000);
 }
 
 static int mmc_update_clk(struct mmc *mmc)
@@ -129,7 +173,7 @@ static int mmc_update_clk(struct mmc *mmc)
 	return 0;
 }
 
-static int mmc_config_clock(struct mmc *mmc, unsigned div)
+static int mmc_config_clock(struct mmc *mmc)
 {
 	struct sunxi_mmc_host *mmchost = mmc->priv;
 	unsigned rval = readl(&mmchost->reg->clkcr);
@@ -140,16 +184,17 @@ static int mmc_config_clock(struct mmc *mmc, unsigned div)
 	if (mmc_update_clk(mmc))
 		return -1;
 
-	/* Change Divider Factor */
+	/* Set mod_clk to new rate */
+	if (mmc_set_mod_clk(mmchost, mmc->clock))
+		return -1;
+
+	/* Clear internal divider */
 	rval &= ~SUNXI_MMC_CLK_DIVIDER_MASK;
-	rval |= div;
 	writel(rval, &mmchost->reg->clkcr);
-	if (mmc_update_clk(mmc))
-		return -1;
+
 	/* Re-enable Clock */
 	rval |= SUNXI_MMC_CLK_ENABLE;
 	writel(rval, &mmchost->reg->clkcr);
-
 	if (mmc_update_clk(mmc))
 		return -1;
 
@@ -159,18 +204,14 @@ static int mmc_config_clock(struct mmc *mmc, unsigned div)
 static void mmc_set_ios(struct mmc *mmc)
 {
 	struct sunxi_mmc_host *mmchost = mmc->priv;
-	unsigned int clkdiv = 0;
 
-	debug("set ios: bus_width: %x, clock: %d, mod_clk: %d\n",
-	      mmc->bus_width, mmc->clock, mmchost->mod_clk);
+	debug("set ios: bus_width: %x, clock: %d\n",
+	      mmc->bus_width, mmc->clock);
 
 	/* Change clock first */
-	clkdiv = (mmchost->mod_clk + (mmc->clock >> 1)) / mmc->clock / 2;
-	if (mmc->clock) {
-		if (mmc_config_clock(mmc, clkdiv)) {
-			mmchost->fatal_err = 1;
-			return;
-		}
+	if (mmc->clock && mmc_config_clock(mmc) != 0) {
+		mmchost->fatal_err = 1;
+		return;
 	}
 
 	/* Change bus width */
-- 
2.1.0

[U-Boot] [PATCH 2/2] sunxi: mmc: Properly setup mod-clk and clock sampling phases

[Ian Campbell]

On Sun, 2014-12-07 at 21:23 +0100, Hans de Goede wrote:
> The sunxi mmc controller has both an internal clock divider, as well as
> the divider in the mod0-clk for the mmc controller.
> 
> The internal divider cannot be used, as it conflicts with the setting of
> clock sampling phases which is done in the mod0-clk, so it must be set to
> 0 (divide by 1).
> 
> For some reason while the kernel has had this correct from day one, the
> u-boot sunxi mmc code has been using a fixed mod0-clk and setting its
> internal divider depending on the desired speed. This is something which
> we've inherited from the original Allwinner u-boot sources, but while this
> has been fixed in Allwinner's own u-boot code at least for the A23 and later
> upstream u-boot was still doing this wrong.
> 
> This commit fixes this, thereby also fixing mmc support not working reliable
> on the A23 (which seems more sensitive to this) and possible also fixes some
> other sunxi mmc issues.
> 
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Acked-by: Ian Campbell <ijc@hellion.org.uk>

[U-Boot] [PATCH 1/2] sun6i: Update Colombus defconfig settings

[Ian Campbell]

On Sun, 2014-12-07 at 21:23 +0100, Hans de Goede wrote:
> The Colombus defconfig settings are missing a number of settings for recently
> added features, because we did not know exactly how things were hooked up.
> 
> Maxime Ripard has run various tests to get us the necessary details, this
> commit updates the defconfig with this info.
> 
> This commit also updates the dram clk and zq values with values verified
> by Maxime to be the ones used by the original firmware for this board.
> 
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Acked-by: Ian Campbell <ian.campbell@citrix.com>

[U-Boot] [PATCH 1/2] sun6i: Update Colombus defconfig settings

[Ian Campbell]

On Mon, 2014-12-08 at 09:26 +0000, Ian Campbell wrote:
> On Sun, 2014-12-07 at 21:23 +0100, Hans de Goede wrote:
> > The Colombus defconfig settings are missing a number of settings for recently
> > added features, because we did not know exactly how things were hooked up.
> > 
> > Maxime Ripard has run various tests to get us the necessary details, this
> > commit updates the defconfig with this info.
> > 
> > This commit also updates the dram clk and zq values with values verified
> > by Maxime to be the ones used by the original firmware for this board.
> > 
> > Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> 
> Acked-by: Ian Campbell <ian.campbell@citrix.com>

Ooops, rather make that ijc at hellion.org.uk, as usual...

Ian.

[U-Boot] [PATCH 1/2] sun6i: Update Colombus defconfig settings

[Hans de Goede]

Hi,

On 08-12-14 10:31, Ian Campbell wrote:
> On Mon, 2014-12-08 at 09:26 +0000, Ian Campbell wrote:
>> On Sun, 2014-12-07 at 21:23 +0100, Hans de Goede wrote:
>>> The Colombus defconfig settings are missing a number of settings for recently
>>> added features, because we did not know exactly how things were hooked up.
>>>
>>> Maxime Ripard has run various tests to get us the necessary details, this
>>> commit updates the defconfig with this info.
>>>
>>> This commit also updates the dram clk and zq values with values verified
>>> by Maxime to be the ones used by the original firmware for this board.
>>>
>>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>>
>> Acked-by: Ian Campbell <ian.campbell@citrix.com>
>
> Ooops, rather make that ijc at hellion.org.uk, as usual...

Thanks for the reviews, I've queued both of these up in u-boot-sunxi/next
(also rebased on latest origin/master, so I've done a forced push).

I would also like to queue these 2 up, if you've some time can you please
review them ?  :

http://patchwork.ozlabs.org/patch/415109/
http://patchwork.ozlabs.org/patch/415110/

Thanks & Regards,

Hans

[U-Boot] [PATCH 1/2] sun6i: Update Colombus defconfig settings

[Ian Campbell]

On Mon, 2014-12-08 at 11:59 +0100, Hans de Goede wrote:
> Hi,
> 
> On 08-12-14 10:31, Ian Campbell wrote:
> > On Mon, 2014-12-08 at 09:26 +0000, Ian Campbell wrote:
> >> On Sun, 2014-12-07 at 21:23 +0100, Hans de Goede wrote:
> >>> The Colombus defconfig settings are missing a number of settings for recently
> >>> added features, because we did not know exactly how things were hooked up.
> >>>
> >>> Maxime Ripard has run various tests to get us the necessary details, this
> >>> commit updates the defconfig with this info.
> >>>
> >>> This commit also updates the dram clk and zq values with values verified
> >>> by Maxime to be the ones used by the original firmware for this board.
> >>>
> >>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> >>
> >> Acked-by: Ian Campbell <ian.campbell@citrix.com>
> >
> > Ooops, rather make that ijc at hellion.org.uk, as usual...
> 
> Thanks for the reviews, I've queued both of these up in u-boot-sunxi/next
> (also rebased on latest origin/master, so I've done a forced push).
> 
> I would also like to queue these 2 up, if you've some time can you please
> review them ?  :
> 
> http://patchwork.ozlabs.org/patch/415109/
> http://patchwork.ozlabs.org/patch/415110/

Ack to both of those too.

Ian.

[U-Boot] [PATCH 1/2] sun6i: Update Colombus defconfig settings

[Hans de Goede]

Hi,

On 08-12-14 12:04, Ian Campbell wrote:
> On Mon, 2014-12-08 at 11:59 +0100, Hans de Goede wrote:
>> Hi,
>>
>> On 08-12-14 10:31, Ian Campbell wrote:
>>> On Mon, 2014-12-08 at 09:26 +0000, Ian Campbell wrote:
>>>> On Sun, 2014-12-07 at 21:23 +0100, Hans de Goede wrote:
>>>>> The Colombus defconfig settings are missing a number of settings for recently
>>>>> added features, because we did not know exactly how things were hooked up.
>>>>>
>>>>> Maxime Ripard has run various tests to get us the necessary details, this
>>>>> commit updates the defconfig with this info.
>>>>>
>>>>> This commit also updates the dram clk and zq values with values verified
>>>>> by Maxime to be the ones used by the original firmware for this board.
>>>>>
>>>>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>>>>
>>>> Acked-by: Ian Campbell <ian.campbell@citrix.com>
>>>
>>> Ooops, rather make that ijc at hellion.org.uk, as usual...
>>
>> Thanks for the reviews, I've queued both of these up in u-boot-sunxi/next
>> (also rebased on latest origin/master, so I've done a forced push).
>>
>> I would also like to queue these 2 up, if you've some time can you please
>> review them ?  :
>>
>> http://patchwork.ozlabs.org/patch/415109/
>> http://patchwork.ozlabs.org/patch/415110/
>
> Ack to both of those too.

Thanks, I've queued both of them up in u-boot-sunxi/next

(Also rebased on rc3, so I did another forced push)

Regards,

Hans