[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Hans de Goede]

Hi,

This is still a bit rough around the edges, I'll clean it up as
time permits and then post it upstream.

In the mean time people interested can find $subject here:
https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-wip

ChenYu, this also has a mmc fix which you may find interesting,
it may explain some of the problems with mmc you've been having
on both the A80 board, as well as the A31 dev board you've.

Regards,

Hans

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[mike.valk at gmail.com]

On Sunday, December 7, 2014 9:27:37 PM UTC+1, Hans de Goede wrote:
> Hi,
> 
> This is still a bit rough around the edges, I'll clean it up as
> time permits and then post it upstream.

Hip, Hip Hooray. Thank you. 

How did you pull it off? Did you find documentation somewhere? Or by piecing things together?

> 
> In the mean time people interested can find $subject here:
> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-wip
> 
> ChenYu, this also has a mmc fix which you may find interesting,
> it may explain some of the problems with mmc you've been having
> on both the A80 board, as well as the A31 dev board you've.
> 
> Regards,
> 
> Hans

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Chen-Yu Tsai]

On Mon, Dec 8, 2014 at 4:27 AM, Hans de Goede <hdegoede@redhat.com> wrote:
> Hi,
>
> This is still a bit rough around the edges, I'll clean it up as
> time permits and then post it upstream.
>
> In the mean time people interested can find $subject here:
> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-wip

Hopefully I'll get around to testing this. BTW, what tablet do
you have?

> ChenYu, this also has a mmc fix which you may find interesting,
> it may explain some of the problems with mmc you've been having
> on both the A80 board, as well as the A31 dev board you've.

Yes. With that fix my Hummingbird A31 boots properly without
raising DCDC1 to 3.3V.

Thanks! I'll send the defconfig out later.


ChenYu

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Hans de Goede]

Hi,

On 08-12-14 15:28, Chen-Yu Tsai wrote:
> On Mon, Dec 8, 2014 at 4:27 AM, Hans de Goede <hdegoede@redhat.com> wrote:
>> Hi,
>>
>> This is still a bit rough around the edges, I'll clean it up as
>> time permits and then post it upstream.
>>
>> In the mean time people interested can find $subject here:
>> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-wip
>
> Hopefully I'll get around to testing this. BTW, what tablet do
> you have?

I've an Ippo q8h v1.2, there are at least 2 differences from the
v5 you've. The dram clk speed and zq value are different, and the wifi
is different. The wifi does not matter for u-boot, but does mean we
need separate dtb files for the 2.

My u-boot sunxi-wip branch has a defconfig for the v1.2, you should be
able to copy that over to the v5 defconfig, adjust dram clk and zq values
with the ones from the v5 fix, change v1.2 to v5 in the CONFIG_FDTFILE
setting and thats it.

Let me know if this works, then I'll also include an update for the v5
defconfig to enable the SPL when I send this upstream.

>> ChenYu, this also has a mmc fix which you may find interesting,
>> it may explain some of the problems with mmc you've been having
>> on both the A80 board, as well as the A31 dev board you've.
>
> Yes. With that fix my Hummingbird A31 boots properly without
> raising DCDC1 to 3.3V.
>
> Thanks! I'll send the defconfig out later.

Good, so I guess this means that DCDC1 should be 3V for your board,
since that is what the factory firmware uses, right ?

I guess it is time to make DCDC1 voltage configurable.

Regards,

Hans

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Chen-Yu Tsai]

Hi,

On Tue, Dec 9, 2014 at 2:53 AM, Hans de Goede <hdegoede@redhat.com> wrote:
> Hi,
>
> On 08-12-14 15:28, Chen-Yu Tsai wrote:
>>
>> On Mon, Dec 8, 2014 at 4:27 AM, Hans de Goede <hdegoede@redhat.com> wrote:
>>>
>>> Hi,
>>>
>>> This is still a bit rough around the edges, I'll clean it up as
>>> time permits and then post it upstream.
>>>
>>> In the mean time people interested can find $subject here:
>>> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-wip
>>
>>
>> Hopefully I'll get around to testing this. BTW, what tablet do
>> you have?
>
>
> I've an Ippo q8h v1.2, there are at least 2 differences from the
> v5 you've. The dram clk speed and zq value are different, and the wifi
> is different. The wifi does not matter for u-boot, but does mean we
> need separate dtb files for the 2.
>
> My u-boot sunxi-wip branch has a defconfig for the v1.2, you should be
> able to copy that over to the v5 defconfig, adjust dram clk and zq values
> with the ones from the v5 fix, change v1.2 to v5 in the CONFIG_FDTFILE
> setting and thats it.
>
> Let me know if this works, then I'll also include an update for the v5
> defconfig to enable the SPL when I send this upstream.

Just gave it a spin, and it works. The dram clock and zq can be
found in sunxi-boards. Note that the actual settings fetched from
stock u-boot has the highest bit of tpr13 set, disabling auto
detection AFAICU. As you've not implemented that part, I used
auto detection and it seems to work.

The only problem I have now is it has no connectivity to the
outside world lol. I would've liked a v2, with a Realtek USB
WiFi chip. What chip does the v1.2 have?

>>> ChenYu, this also has a mmc fix which you may find interesting,
>>> it may explain some of the problems with mmc you've been having
>>> on both the A80 board, as well as the A31 dev board you've.
>>
>>
>> Yes. With that fix my Hummingbird A31 boots properly without
>> raising DCDC1 to 3.3V.
>>
>> Thanks! I'll send the defconfig out later.
>
>
> Good, so I guess this means that DCDC1 should be 3V for your board,
> since that is what the factory firmware uses, right ?
>
> I guess it is time to make DCDC1 voltage configurable.

3V seems to be the lowest tolerable voltage for some bits. Making it
3.3V might be a bit better. But with my light usage, I don't see any
stability issues.

ChenYu

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Hans de Goede]

Hi,

On 09-12-14 11:17, Chen-Yu Tsai wrote:
> Hi,
>
> On Tue, Dec 9, 2014 at 2:53 AM, Hans de Goede <hdegoede@redhat.com> wrote:
>> Hi,
>>
>> On 08-12-14 15:28, Chen-Yu Tsai wrote:
>>>
>>> On Mon, Dec 8, 2014 at 4:27 AM, Hans de Goede <hdegoede@redhat.com> wrote:
>>>>
>>>> Hi,
>>>>
>>>> This is still a bit rough around the edges, I'll clean it up as
>>>> time permits and then post it upstream.
>>>>
>>>> In the mean time people interested can find $subject here:
>>>> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-wip
>>>
>>>
>>> Hopefully I'll get around to testing this. BTW, what tablet do
>>> you have?
>>
>>
>> I've an Ippo q8h v1.2, there are at least 2 differences from the
>> v5 you've. The dram clk speed and zq value are different, and the wifi
>> is different. The wifi does not matter for u-boot, but does mean we
>> need separate dtb files for the 2.
>>
>> My u-boot sunxi-wip branch has a defconfig for the v1.2, you should be
>> able to copy that over to the v5 defconfig, adjust dram clk and zq values
>> with the ones from the v5 fix, change v1.2 to v5 in the CONFIG_FDTFILE
>> setting and thats it.
>>
>> Let me know if this works, then I'll also include an update for the v5
>> defconfig to enable the SPL when I send this upstream.
>
> Just gave it a spin, and it works. The dram clock and zq can be
> found in sunxi-boards.

Good, I'll update my patch-set to reflect this.

> Note that the actual settings fetched from
> stock u-boot has the highest bit of tpr13 set, disabling auto
> detection AFAICU. As you've not implemented that part, I used
> auto detection and it seems to work.

It is implemented in the actual dram_init code, but for now I've
all the dram_paras hardcoded except the clk and the zq value. If
autodetect works I see no reason to change this, but for future models,
if necessary the code for dealing with manual config is there, to test
just put the values directly in the dram_para struct at the top of
dram_sun8i.c .

> The only problem I have now is it has no connectivity to the
> outside world lol. I would've liked a v2, with a Realtek USB
> WiFi chip. What chip does the v1.2 have?

An sdio based chip, the RDA RDA5990P, as mentioned here:

http://linux-sunxi.org/Ippo_q8h#Q8H-V1.2

It does have an empty spot on the pcb for a usb wifi module, I plan to
hookup a usb connector to that one of these days, and see if I can get
a USB host working this way.

>>>> ChenYu, this also has a mmc fix which you may find interesting,
>>>> it may explain some of the problems with mmc you've been having
>>>> on both the A80 board, as well as the A31 dev board you've.
>>>
>>>
>>> Yes. With that fix my Hummingbird A31 boots properly without
>>> raising DCDC1 to 3.3V.
>>>
>>> Thanks! I'll send the defconfig out later.
>>
>>
>> Good, so I guess this means that DCDC1 should be 3V for your board,
>> since that is what the factory firmware uses, right ?
>>
>> I guess it is time to make DCDC1 voltage configurable.
>
> 3V seems to be the lowest tolerable voltage for some bits. Making it
> 3.3V might be a bit better. But with my light usage, I don't see any
> stability issues.

Right, I guess 3V is used to safe battery, which makes sense (in tablets /
phones)

As said I'll make this configurable making 3V the default and set 3V3
in the defconfig where the original firmware does that.

Regards,

Hans

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Chen-Yu Tsai]

On Tue, Dec 9, 2014 at 6:25 PM, Hans de Goede <hdegoede@redhat.com> wrote:
> On 09-12-14 11:17, Chen-Yu Tsai wrote:
>> On Tue, Dec 9, 2014 at 2:53 AM, Hans de Goede <hdegoede@redhat.com> wrote:
>>> On 08-12-14 15:28, Chen-Yu Tsai wrote:
>>>> On Mon, Dec 8, 2014 at 4:27 AM, Hans de Goede <hdegoede@redhat.com>
>>>> wrote:
>>>>>
>>>>>
>>>>> Hi,
>>>>>
>>>>> This is still a bit rough around the edges, I'll clean it up as
>>>>> time permits and then post it upstream.
>>>>>
>>>>> In the mean time people interested can find $subject here:
>>>>> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-wip
>>>>
>>>>
>>>>
>>>> Hopefully I'll get around to testing this. BTW, what tablet do
>>>> you have?
>>>
>>>
>>>
>>> I've an Ippo q8h v1.2, there are at least 2 differences from the
>>> v5 you've. The dram clk speed and zq value are different, and the wifi
>>> is different. The wifi does not matter for u-boot, but does mean we
>>> need separate dtb files for the 2.
>>>
>>> My u-boot sunxi-wip branch has a defconfig for the v1.2, you should be
>>> able to copy that over to the v5 defconfig, adjust dram clk and zq values
>>> with the ones from the v5 fix, change v1.2 to v5 in the CONFIG_FDTFILE
>>> setting and thats it.
>>>
>>> Let me know if this works, then I'll also include an update for the v5
>>> defconfig to enable the SPL when I send this upstream.
>>
>>
>> Just gave it a spin, and it works. The dram clock and zq can be
>> found in sunxi-boards.
>
>
> Good, I'll update my patch-set to reflect this.
>
>> Note that the actual settings fetched from
>> stock u-boot has the highest bit of tpr13 set, disabling auto
>> detection AFAICU. As you've not implemented that part, I used
>> auto detection and it seems to work.
>
>
> It is implemented in the actual dram_init code, but for now I've
> all the dram_paras hardcoded except the clk and the zq value. If
> autodetect works I see no reason to change this, but for future models,
> if necessary the code for dealing with manual config is there, to test
> just put the values directly in the dram_para struct at the top of
> dram_sun8i.c .
>
>> The only problem I have now is it has no connectivity to the
>> outside world lol. I would've liked a v2, with a Realtek USB
>> WiFi chip. What chip does the v1.2 have?
>
>
> An sdio based chip, the RDA RDA5990P, as mentioned here:
>
> http://linux-sunxi.org/Ippo_q8h#Q8H-V1.2

Not sure this would require a different DT. Probably the GPIOs
are different.

> It does have an empty spot on the pcb for a usb wifi module, I plan to
> hookup a usb connector to that one of these days, and see if I can get
> a USB host working this way.

I should do that too. Nice way to hook up ethernet. Small problem would
be getting 5V from the board for VBUS.

Also I have a schematic file for A23 that someone provided me.
I don't remember who...

It lists:
  - ALDO2 connected to VCC-DLL @ 2.5V
  - ALDO3 to VCC-PLL and AVCC (analog power) @ 3.0V
  - DCDC1 to all the normal stuff @ 3V
  - DCDC2 to VDD-SYS @ 1.1V
  - DCDC3 to VDD-CPU (main cpu) @ 1.1V (1.26V in my fex file)
  - DCDC5 to VCC-DRAM @ 1.1V (1.5V in my fex file)
  - DC5LDO to VDD-CPUS (special cpu)

>>>>> ChenYu, this also has a mmc fix which you may find interesting,
>>>>> it may explain some of the problems with mmc you've been having
>>>>> on both the A80 board, as well as the A31 dev board you've.
>>>>
>>>>
>>>>
>>>> Yes. With that fix my Hummingbird A31 boots properly without
>>>> raising DCDC1 to 3.3V.
>>>>
>>>> Thanks! I'll send the defconfig out later.
>>>
>>>
>>>
>>> Good, so I guess this means that DCDC1 should be 3V for your board,
>>> since that is what the factory firmware uses, right ?
>>>
>>> I guess it is time to make DCDC1 voltage configurable.
>>
>>
>> 3V seems to be the lowest tolerable voltage for some bits. Making it
>> 3.3V might be a bit better. But with my light usage, I don't see any
>> stability issues.
>
>
> Right, I guess 3V is used to safe battery, which makes sense (in tablets /
> phones)
>
> As said I'll make this configurable making 3V the default and set 3V3
> in the defconfig where the original firmware does that.

Thanks!

ChenYu

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Hans de Goede]

Hi,

On 09-12-14 13:31, Chen-Yu Tsai wrote:

<snip>

> Also I have a schematic file for A23 that someone provided me.
> I don't remember who...
>
> It lists:
>    - ALDO2 connected to VCC-DLL @ 2.5V
>    - ALDO3 to VCC-PLL and AVCC (analog power) @ 3.0V
>    - DCDC1 to all the normal stuff @ 3V
>    - DCDC2 to VDD-SYS @ 1.1V
>    - DCDC3 to VDD-CPU (main cpu) @ 1.1V (1.26V in my fex file)
>    - DCDC5 to VCC-DRAM @ 1.1V (1.5V in my fex file)
>    - DC5LDO to VDD-CPUS (special cpu)

Thanks for this info!

I've prepared a sun8i / A23 set for u-boot which I'll send upstream
as soon as I've verified that it does not break A31 support.

One thing which I've done is make u-boot explicitly disable power
outputs which are unused, the specific target for this is DCDC4
which is enabled by default at power on and not used on sun8i.

As a side effect this also disabled ALDO1 which is enabled at power
on too, and guess what, promptly my sdcard stopped working.

So it seems that ALDO1 is hookedup to the sdcard on the Ippo
tablets, for now I've also enabled ALDO1 in the defconfig for V5, it would
be great if you could give my current sunxi-wip branch a try on your
V5 tablet, and if it works remove the setting of ALDO1 from the V5
defconfig and then try again. If it is like my V1.2 then it will
stop booting when the SPL tries to load u-boot from the sdcard.

Regards,

Hans

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Chen-Yu Tsai]

Hi,

On Sat, Dec 13, 2014 at 9:58 PM, Hans de Goede <hdegoede@redhat.com> wrote:
> Hi,
>
> On 09-12-14 13:31, Chen-Yu Tsai wrote:
>
> <snip>
>
>> Also I have a schematic file for A23 that someone provided me.
>> I don't remember who...
>>
>> It lists:
>>    - ALDO2 connected to VCC-DLL @ 2.5V
>>    - ALDO3 to VCC-PLL and AVCC (analog power) @ 3.0V
>>    - DCDC1 to all the normal stuff @ 3V
>>    - DCDC2 to VDD-SYS @ 1.1V
>>    - DCDC3 to VDD-CPU (main cpu) @ 1.1V (1.26V in my fex file)
>>    - DCDC5 to VCC-DRAM @ 1.1V (1.5V in my fex file)
>>    - DC5LDO to VDD-CPUS (special cpu)
>
>
> Thanks for this info!
>
> I've prepared a sun8i / A23 set for u-boot which I'll send upstream
> as soon as I've verified that it does not break A31 support.
>
> One thing which I've done is make u-boot explicitly disable power
> outputs which are unused, the specific target for this is DCDC4
> which is enabled by default at power on and not used on sun8i.
>
> As a side effect this also disabled ALDO1 which is enabled at power
> on too, and guess what, promptly my sdcard stopped working.
>
> So it seems that ALDO1 is hookedup to the sdcard on the Ippo
> tablets, for now I've also enabled ALDO1 in the defconfig for V5, it would
> be great if you could give my current sunxi-wip branch a try on your
> V5 tablet, and if it works remove the setting of ALDO1 from the V5
> defconfig and then try again. If it is like my V1.2 then it will
> stop booting when the SPL tries to load u-boot from the sdcard.

I missed that one. ALDO1 is connected to VCC-IO (pin controller I think),
VCC-PD (whatever that is, it isn't on the datasheet, but the schematic
implies it's part of the LCD block), VCC-USB (USB block in the SoC),
VCC-IO-WIFI (pull-ups and stuff for mmc wifi), and HPVCC (builtin
headphone amp).

Others I failed to mention:

ELDO2 to DVDD1V8-CSI @ 1.8V
GPIO0 to AVDD-CSI @ 2.8V
DC1SW to VCC-LCD @ 3V (this is just a switchable output of DCDC1)

Hope this helps.

ChenYu

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Hans de Goede]

Hi,

On 13-12-14 17:07, Chen-Yu Tsai wrote:
> Hi,
>
> On Sat, Dec 13, 2014 at 9:58 PM, Hans de Goede <hdegoede@redhat.com> wrote:
>> Hi,
>>
>> On 09-12-14 13:31, Chen-Yu Tsai wrote:
>>
>> <snip>
>>
>>> Also I have a schematic file for A23 that someone provided me.
>>> I don't remember who...
>>>
>>> It lists:
>>>     - ALDO2 connected to VCC-DLL @ 2.5V
>>>     - ALDO3 to VCC-PLL and AVCC (analog power) @ 3.0V
>>>     - DCDC1 to all the normal stuff @ 3V
>>>     - DCDC2 to VDD-SYS @ 1.1V
>>>     - DCDC3 to VDD-CPU (main cpu) @ 1.1V (1.26V in my fex file)
>>>     - DCDC5 to VCC-DRAM @ 1.1V (1.5V in my fex file)
>>>     - DC5LDO to VDD-CPUS (special cpu)
>>
>>
>> Thanks for this info!
>>
>> I've prepared a sun8i / A23 set for u-boot which I'll send upstream
>> as soon as I've verified that it does not break A31 support.
>>
>> One thing which I've done is make u-boot explicitly disable power
>> outputs which are unused, the specific target for this is DCDC4
>> which is enabled by default at power on and not used on sun8i.
>>
>> As a side effect this also disabled ALDO1 which is enabled at power
>> on too, and guess what, promptly my sdcard stopped working.
>>
>> So it seems that ALDO1 is hookedup to the sdcard on the Ippo
>> tablets, for now I've also enabled ALDO1 in the defconfig for V5, it would
>> be great if you could give my current sunxi-wip branch a try on your
>> V5 tablet, and if it works remove the setting of ALDO1 from the V5
>> defconfig and then try again. If it is like my V1.2 then it will
>> stop booting when the SPL tries to load u-boot from the sdcard.
>
> I missed that one. ALDO1 is connected to VCC-IO (pin controller I think),
> VCC-PD (whatever that is, it isn't on the datasheet, but the schematic
> implies it's part of the LCD block), VCC-USB (USB block in the SoC),
> VCC-IO-WIFI (pull-ups and stuff for mmc wifi), and HPVCC (builtin
> headphone amp).

Thanks for the info. Weird thing is it is not listed in the fex, and
android on my Ippo Q8H v1.2 seems to set it to 2.5 volt, which is somewhat
lowish, it is below the minimum recommended voltage for Vusb (which is 2.7)
and way below the minimum recommended voltage for HPVCC which is 3.0,
according to the A31 datasheet (the A23 datasheet does not list it).

I've updated the defconfigs to set ALDO1 to 3.0 V and gave them a comment
to explain to which voltages it is connected.

As for VCC-PD it is in the A23 datasheet, in the "pin description" chapter
under GPIO-D, it powers the port D gpio pins.

Regards,

Hans

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Ricky Xian]

Hi,

I'm trying to boot from usb fel mode on A23. I have rebuilt your sunxi-wip 
branch, and try to run on my A23 (q88?) board, but it's failed in fel mode 
in executing.

I think the u-boot-spl.bin can be used as A20, this's the website I refer 
to: 
http://docs.cubieboard.org/tutorials/cb2/development/booting_from_usb_in_fel_mode

my testing instructions are:

fel write address  u-boot-spl.bin
fel exec address

the address for A20 is 0x2000, so that the DRAM will be initialized. but 
it's incorrect for A23 if the size reach 0x4000. 

can you please let me know how to use fel and your u-boot-spl.bin? 

Thanks!
Ricky


On Sunday, December 14, 2014 5:44:18 PM UTC+8, Hans de Goede wrote:
>
> Hi, 
>
> On 13-12-14 17:07, Chen-Yu Tsai wrote: 
> > Hi, 
> > 
> > On Sat, Dec 13, 2014 at 9:58 PM, Hans de Goede <hdeg...@redhat.com 
> <javascript:>> wrote: 
> >> Hi, 
> >> 
> >> On 09-12-14 13:31, Chen-Yu Tsai wrote: 
> >> 
> >> <snip> 
> >> 
> >>> Also I have a schematic file for A23 that someone provided me. 
> >>> I don't remember who... 
> >>> 
> >>> It lists: 
> >>>     - ALDO2 connected to VCC-DLL @ 2.5V 
> >>>     - ALDO3 to VCC-PLL and AVCC (analog power) @ 3.0V 
> >>>     - DCDC1 to all the normal stuff @ 3V 
> >>>     - DCDC2 to VDD-SYS @ 1.1V 
> >>>     - DCDC3 to VDD-CPU (main cpu) @ 1.1V (1.26V in my fex file) 
> >>>     - DCDC5 to VCC-DRAM @ 1.1V (1.5V in my fex file) 
> >>>     - DC5LDO to VDD-CPUS (special cpu) 
> >> 
> >> 
> >> Thanks for this info! 
> >> 
> >> I've prepared a sun8i / A23 set for u-boot which I'll send upstream 
> >> as soon as I've verified that it does not break A31 support. 
> >> 
> >> One thing which I've done is make u-boot explicitly disable power 
> >> outputs which are unused, the specific target for this is DCDC4 
> >> which is enabled by default at power on and not used on sun8i. 
> >> 
> >> As a side effect this also disabled ALDO1 which is enabled at power 
> >> on too, and guess what, promptly my sdcard stopped working. 
> >> 
> >> So it seems that ALDO1 is hookedup to the sdcard on the Ippo 
> >> tablets, for now I've also enabled ALDO1 in the defconfig for V5, it 
> would 
> >> be great if you could give my current sunxi-wip branch a try on your 
> >> V5 tablet, and if it works remove the setting of ALDO1 from the V5 
> >> defconfig and then try again. If it is like my V1.2 then it will 
> >> stop booting when the SPL tries to load u-boot from the sdcard. 
> > 
> > I missed that one. ALDO1 is connected to VCC-IO (pin controller I 
> think), 
> > VCC-PD (whatever that is, it isn't on the datasheet, but the schematic 
> > implies it's part of the LCD block), VCC-USB (USB block in the SoC), 
> > VCC-IO-WIFI (pull-ups and stuff for mmc wifi), and HPVCC (builtin 
> > headphone amp). 
>
> Thanks for the info. Weird thing is it is not listed in the fex, and 
> android on my Ippo Q8H v1.2 seems to set it to 2.5 volt, which is somewhat 
> lowish, it is below the minimum recommended voltage for Vusb (which is 
> 2.7) 
> and way below the minimum recommended voltage for HPVCC which is 3.0, 
> according to the A31 datasheet (the A23 datasheet does not list it). 
>
> I've updated the defconfigs to set ALDO1 to 3.0 V and gave them a comment 
> to explain to which voltages it is connected. 
>
> As for VCC-PD it is in the A23 datasheet, in the "pin description" chapter 
> under GPIO-D, it powers the port D gpio pins. 
>
> Regards, 
>
> Hans 
>

[U-Boot] [linux-sunxi] Re: A23 u-boot with SPL / dram init available in my personal git repo

[Siarhei Siamashka]

On Sun, 14 Dec 2014 22:01:29 -0800 (PST)
Ricky Xian <szricky@gmail.com> wrote:

> Hi,
> 
> I'm trying to boot from usb fel mode on A23. I have rebuilt your sunxi-wip 
> branch, and try to run on my A23 (q88?) board, but it's failed in fel mode 
> in executing.
> 
> I think the u-boot-spl.bin can be used as A20, this's the website I refer 
> to: 
> http://docs.cubieboard.org/tutorials/cb2/development/booting_from_usb_in_fel_mode
> 
> my testing instructions are:
> 
> fel write address  u-boot-spl.bin
> fel exec address
> 
> the address for A20 is 0x2000, so that the DRAM will be initialized. but 
> it's incorrect for A23 if the size reach 0x4000. 
> 
> can you please let me know how to use fel and your u-boot-spl.bin? 

The size 0x4000 is just too large for the SPL binary. You can have a
look at the SRAM memory map that is used in the FEL mode here:
    https://github.com/hno/Allwinner-Info/blob/master/FEL-usb/USB-protocol.txt

Basically, there are two areas. One starts at 0x2000 and ends somewhere
around 0x5D00 (may be slightly different for different SoC variants).
The stack pointer is set right at the end of this area by the BROM
code before passing control to SPL. So in practice it means that SPL
code, data and stack must all fit there in just ~15K.

Another free area is around 0x8000-0xbfff, at least on A10/A13/A20.

The rest of SRAM is used by the BROM code for implementing FEL USB
protocol and we should not touch it.

In order to provide more room for SPL in the FEL mode, the following
things can be done:
1) Compile the FEL SPL in Thumb2 mode instead of ARM mode, that's going
to save around 30% of code size (depending on the compiler version).
2) Take the extra 0x8000-0xbfff area into use.

I had a patch for this earlier (it is currently self-NAKED):
    http://lists.denx.de/pipermail/u-boot/2014-July/183985.html

Switching to Thumb2 should be perfectly safe. But before using the
0x8000-0xbfff area, we need to confirm that it is really free to
use on every Allwinner SoC variant and does not clash with the
data structures used by the FEL BROM code. The FEL SRAM memory map
details can be probably clarified by the Allwinner representatives.

I was kind of reluctant to settle with the Thumb2 part alone until
the sunxi custodians acknowledge that the SPL code size is actually
a real practical problem. For example, this is important for making
other decisions and having some progress with
    http://lists.denx.de/pipermail/u-boot/2014-August/185722.html    

To sum it up. Just try to reduce the SPL size. Maybe try a different
gcc version to compile it. Maybe try to apply the Thumb2 tweak.

-- 
Best regards,
Siarhei Siamashka

[U-Boot] [linux-sunxi] Re: A23 u-boot with SPL / dram init available in my personal git repo

[Ricky Xian]

Thanks Siarhei ~! 

I think it's what Hans's working on, I want to know the debugging 
instructions of this branch so that I can try with my board.

the uart is combined with sd card, so I can't boot from  sd card.



On Monday, December 15, 2014 5:28:46 PM UTC+8, Siarhei Siamashka wrote:
>
> On Sun, 14 Dec 2014 22:01:29 -0800 (PST) 
> Ricky Xian <szr...@gmail.com <javascript:>> wrote: 
>
> > Hi, 
> > 
> > I'm trying to boot from usb fel mode on A23. I have rebuilt your 
> sunxi-wip 
> > branch, and try to run on my A23 (q88?) board, but it's failed in fel 
> mode 
> > in executing. 
> > 
> > I think the u-boot-spl.bin can be used as A20, this's the website I 
> refer 
> > to: 
> > 
> http://docs.cubieboard.org/tutorials/cb2/development/booting_from_usb_in_fel_mode 
> > 
> > my testing instructions are: 
> > 
> > fel write address  u-boot-spl.bin 
> > fel exec address 
> > 
> > the address for A20 is 0x2000, so that the DRAM will be initialized. but 
> > it's incorrect for A23 if the size reach 0x4000. 
> > 
> > can you please let me know how to use fel and your u-boot-spl.bin? 
>
> The size 0x4000 is just too large for the SPL binary. You can have a 
> look at the SRAM memory map that is used in the FEL mode here: 
>     
> https://github.com/hno/Allwinner-Info/blob/master/FEL-usb/USB-protocol.txt 
>
> Basically, there are two areas. One starts at 0x2000 and ends somewhere 
> around 0x5D00 (may be slightly different for different SoC variants). 
> The stack pointer is set right at the end of this area by the BROM 
> code before passing control to SPL. So in practice it means that SPL 
> code, data and stack must all fit there in just ~15K. 
>
> Another free area is around 0x8000-0xbfff, at least on A10/A13/A20. 
>
> The rest of SRAM is used by the BROM code for implementing FEL USB 
> protocol and we should not touch it. 
>
> In order to provide more room for SPL in the FEL mode, the following 
> things can be done: 
> 1) Compile the FEL SPL in Thumb2 mode instead of ARM mode, that's going 
> to save around 30% of code size (depending on the compiler version). 
> 2) Take the extra 0x8000-0xbfff area into use. 
>
> I had a patch for this earlier (it is currently self-NAKED): 
>     http://lists.denx.de/pipermail/u-boot/2014-July/183985.html 
>
> Switching to Thumb2 should be perfectly safe. But before using the 
> 0x8000-0xbfff area, we need to confirm that it is really free to 
> use on every Allwinner SoC variant and does not clash with the 
> data structures used by the FEL BROM code. The FEL SRAM memory map 
> details can be probably clarified by the Allwinner representatives. 
>
> I was kind of reluctant to settle with the Thumb2 part alone until 
> the sunxi custodians acknowledge that the SPL code size is actually 
> a real practical problem. For example, this is important for making 
> other decisions and having some progress with 
>     http://lists.denx.de/pipermail/u-boot/2014-August/185722.html     
>
> To sum it up. Just try to reduce the SPL size. Maybe try a different 
> gcc version to compile it. Maybe try to apply the Thumb2 tweak. 
>
> -- 
> Best regards, 
> Siarhei Siamashka 
>

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Hans de Goede]

Hi,

On 15-12-14 07:01, Ricky Xian wrote:
> Hi,
>
> I'm trying to boot from usb fel mode on A23. I have rebuilt your sunxi-wip
> branch, and try to run on my A23 (q88?) board, but it's failed in fel mode
> in executing.
>
> I think the u-boot-spl.bin can be used as A20, this's the website I refer
> to:
> http://docs.cubieboard.org/tutorials/cb2/development/booting_from_usb_in_fel_mode
>
> my testing instructions are:
>
> fel write address  u-boot-spl.bin
> fel exec address
>
> the address for A20 is 0x2000, so that the DRAM will be initialized. but
> it's incorrect for A23 if the size reach 0x4000.
>
> can you please let me know how to use fel and your u-boot-spl.bin?

I've just tested this, and it works fine for me using the following commands:

make -j4 CROSS_COMPILE=arm-linux-gnu- Ippo_q8h_v1_2_felconfig

Note the _felconfig rather then _defconfig at the end !

And then:

make -j4 CROSS_COMPILE=arm-linux-gnu-

sudo ~hans/bin/fel write 0x2000 spl/u-boot-spl.bin
sudo ~hans/bin/fel exe 0x2000
sleep 0.5
sudo ~hans/bin/fel write 0x4a000000 u-boot.bin
sudo ~hans/bin/fel exe 0x4a000000

Regards,

Hans

[U-Boot] A23 u-boot with SPL / dram init available in my personal git repo

[Maxime Ripard]

On Sun, Dec 07, 2014 at 09:27:27PM +0100, Hans de Goede wrote:
> Hi,
> 
> This is still a bit rough around the edges, I'll clean it up as
> time permits and then post it upstream.
> 
> In the mean time people interested can find $subject here:
> https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-wip
> 
> ChenYu, this also has a mmc fix which you may find interesting,
> it may explain some of the problems with mmc you've been having
> on both the A80 board, as well as the A31 dev board you've.

Wow, very cool, including PMIC support et al.

Thanks a lot :)

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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