[U-Boot] [PATCH] arm:ls1021a:configure ls1021 scfg for QSPI

[U-Boot] [PATCH] arm:ls1021a:configure ls1021 scfg for QSPI

[Chao Fu]

From: Chao Fu <B44548@freescale.com>

Configure ls1021a scfg register for QSPI clock initalization.

Signed-off-by: Chao Fu <B44548@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
---
 arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
 board/freescale/ls1021aqds/ls1021aqds.c           | 4 ++++
 board/freescale/ls1021atwr/ls1021atwr.c           | 4 ++++
 3 files changed, 9 insertions(+)

diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index 7995fe2..cdee199 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -100,6 +100,7 @@ struct ccsr_gur {
 #define SCFG_ETSECDMAMCR_LE_BD_FR	0xf8001a0f
 #define SCFG_ETSECCMCR_GE2_CLK125	0x04000000
 #define SCFG_PIXCLKCR_PXCKEN		0x80000000
+#define SCFG_QSPI_CLKSEL		0xc0100000
 
 /* Supplemental Configuration Unit */
 struct ccsr_scfg {
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 32e0fef..70da686 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -146,6 +146,10 @@ int board_early_init_f(void)
 	init_early_memctl_regs();
 #endif
 
+#ifdef CONFIG_FSL_QSPI
+	out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
+#endif
+
 	/* Workaround for the issue that DDR could not respond to
 	 * barrier transaction which is generated by executing DSB/ISB
 	 * instruction. Set CCI-400 control override register to
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 50d5640..25b1eb9 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -278,6 +278,10 @@ int board_init(void)
 	config_serdes_mux();
 #endif
 
+#ifdef CONFIG_FSL_QSPI
+	out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
+#endif
+
 	return 0;
 }
 
-- 
1.8.4

[U-Boot] [PATCH] arm:ls1021a:configure ls1021 scfg for QSPI

[York Sun]

On 10/29/2014 11:26 PM, Chao Fu wrote:
> From: Chao Fu <B44548@freescale.com>
> 
> Configure ls1021a scfg register for QSPI clock initalization.
> 
> Signed-off-by: Chao Fu <B44548@freescale.com>
> Signed-off-by: Alison Wang <alison.wang@freescale.com>
> ---
>  arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
>  board/freescale/ls1021aqds/ls1021aqds.c           | 4 ++++
>  board/freescale/ls1021atwr/ls1021atwr.c           | 4 ++++
>  3 files changed, 9 insertions(+)
> 

Looks like this patch can be dropped as the change is in
http://patchwork.ozlabs.org/patch/418986/.

York

[U-Boot] [PATCH] arm:ls1021a:configure ls1021 scfg for QSPI

[Huan Wang]

Hi, York,

> On 10/29/2014 11:26 PM, Chao Fu wrote:
> > From: Chao Fu <B44548@freescale.com>
> >
> > Configure ls1021a scfg register for QSPI clock initalization.
> >
> > Signed-off-by: Chao Fu <B44548@freescale.com>
> > Signed-off-by: Alison Wang <alison.wang@freescale.com>
> > ---
> >  arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +
> >  board/freescale/ls1021aqds/ls1021aqds.c           | 4 ++++
> >  board/freescale/ls1021atwr/ls1021atwr.c           | 4 ++++
> >  3 files changed, 9 insertions(+)
> >
> 
> Looks like this patch can be dropped as the change is in
> http://patchwork.ozlabs.org/patch/418986/.

[Alison Wang] Yes. Thanks.


Best Regards,
Alison Wang