* [U-Boot] [PATCH] ls1021aqds: set the default I2C channel before DDR init
@ 2014-11-06 2:51 Alison Wang
2014-12-11 19:00 ` York Sun
0 siblings, 1 reply; 2+ messages in thread
From: Alison Wang @ 2014-11-06 2:51 UTC (permalink / raw)
To: u-boot
From: Chenhui Zhao <chenhui.zhao@freescale.com>
When resuming from deep sleep, the I2C channel may not be
in the default channel. So, switch to the default channel
before accessing DDR SPD.
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
---
board/freescale/ls1021aqds/ls1021aqds.c | 32 +++++++++++++++++++-------------
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 485f412..7edc828 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -137,8 +137,27 @@ unsigned long get_board_ddr_clk(void)
return 66666666;
}
+int select_i2c_ch_pca9547(u8 ch)
+{
+ int ret;
+
+ ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+ if (ret) {
+ puts("PCA: failed to select proper channel\n");
+ return ret;
+ }
+
+ return 0;
+}
+
int dram_init(void)
{
+ /*
+ * When resuming from deep sleep, the I2C channel may not be
+ * in the default channel. So, switch to the default channel
+ * before accessing DDR SPD.
+ */
+ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
gd->ram_size = initdram(0);
return 0;
@@ -157,19 +176,6 @@ int board_mmc_init(bd_t *bis)
}
#endif
-int select_i2c_ch_pca9547(u8 ch)
-{
- int ret;
-
- ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
- if (ret) {
- puts("PCA: failed to select proper channel\n");
- return ret;
- }
-
- return 0;
-}
-
int board_early_init_f(void)
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [U-Boot] [PATCH] ls1021aqds: set the default I2C channel before DDR init
2014-11-06 2:51 [U-Boot] [PATCH] ls1021aqds: set the default I2C channel before DDR init Alison Wang
@ 2014-12-11 19:00 ` York Sun
0 siblings, 0 replies; 2+ messages in thread
From: York Sun @ 2014-12-11 19:00 UTC (permalink / raw)
To: u-boot
On 11/05/2014 06:51 PM, Alison Wang wrote:
> From: Chenhui Zhao <chenhui.zhao@freescale.com>
>
> When resuming from deep sleep, the I2C channel may not be
> in the default channel. So, switch to the default channel
> before accessing DDR SPD.
>
> Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
> ---
Applied to u-boot-fsl-qoriq master, awaiting upstream.
York
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2014-11-06 2:51 [U-Boot] [PATCH] ls1021aqds: set the default I2C channel before DDR init Alison Wang
2014-12-11 19:00 ` York Sun
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