From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lubomir Popov Date: Thu, 18 Dec 2014 13:00:34 +0200 Subject: [U-Boot] [PATCH] ARM: OMAP5: DRA7xx: Enable I2C4 and I2C5 usage on the J6Eco EVM In-Reply-To: <20141117134005.GR21184@bill-the-cat> References: <4d9438c935a22127f16d5dc534b6130e.squirrel@www.mm-sol.com> <20141117134005.GR21184@bill-the-cat> Message-ID: <5492B3D2.9050107@mm-sol.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Tom, Even if this patch is not applied if considered useless, the one fixing the clocks (http://patchwork.ozlabs.org/patch/410834/) should be, in my opinion, as it is essentially a bug fix. Now, for the DRA7xx SoCs, 1) a write to a undefined (or zero) register address is occurring since struct member .cm_l4per_i2c5_clkctrl is not initialized, and 2) a 'data abort' exception shall happen if access to I2C5 is tried due to lack of the functional clock. Best regards, Lubo