From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joonyoung Shim Date: Tue, 13 Jan 2015 11:24:16 +0900 Subject: [U-Boot] Question about compile warnings of exynos clock Message-ID: <54B481D0.2070508@samsung.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, I found below compile warnings, CC arch/arm/cpu/armv7/exynos/clock.o arch/arm/cpu/armv7/exynos/clock.c: In function ?clock_get_periph_rate?: arch/arm/cpu/armv7/exynos/clock.c:265:47: warning: array subscript is above array bounds [-Warray-bounds] struct clk_bit_info *bit_info = &clk_bit_info[peripheral]; ^ arch/arm/cpu/armv7/exynos/clock.c:265:47: warning: array subscript is above array bounds [-Warray-bounds] ... > static unsigned long exynos5_get_periph_rate(int peripheral) > { > struct clk_bit_info *bit_info = &clk_bit_info[peripheral]; > This can access out of bounds of clk_bit_info[] array from exynos5_get_periph_rate(). The peripheral value comes from enum periph_id but it gets out of count clk_bit_info[] array. So, i don't think exynos5_get_periph_rate is working correctly. Currently, exynos5_get_periph_rate is used by clock_get_periph_rate only from get_pwm_clk. Is it ongoing to work for generic api to get the clk freq? If not, let's remove exynos5_get_periph_rate and clock_get_periph_rate. Thanks.