[U-Boot] [PATCH 01/11] fpga: Protect GZIP usage when LOADMK is enabled

[U-Boot] [PATCH 01/11] fpga: Protect GZIP usage when LOADMK is enabled

[Michal Simek]

For case where CMD_FPGA_LOADMK is enabled and GZIP disable.

Warning log:
common/built-in.o: In function `do_fpga':
/mnt/disk/u-boot/common/cmd_fpga.c:218: undefined reference to `gunzip'

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 common/cmd_fpga.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index 8c5bf440fbb0..484a6c6ce036 100644
--- a/common/cmd_fpga.c
+++ b/common/cmd_fpga.c
@@ -211,6 +211,7 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])

 				comp = image_get_comp(hdr);
 				if (comp == IH_COMP_GZIP) {
+#if defined(CONFIG_GZIP)
 					ulong image_buf = image_get_data(hdr);
 					data = image_get_load(hdr);
 					ulong image_size = ~0UL;
@@ -222,6 +223,10 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 						return 1;
 					}
 					data_size = image_size;
+#else
+					puts("Gunzip image is not supported\n");
+					return 1;
+#endif
 				} else {
 					data = (ulong)image_get_data(hdr);
 					data_size = image_get_data_size(hdr);
--
1.8.2.3

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[U-Boot] [PATCH 02/11] fpga: Remove extern prototypes from .h

[Michal Simek]

This problem is reported by checkpatch.pl
Warnings:
CHECK: extern prototypes should be avoided in .h files

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 include/fpga.h | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/fpga.h b/include/fpga.h
index 914024c17cb8..ef044e936294 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -49,18 +49,18 @@ typedef enum {
 } bitstream_type;

 /* root function definitions */
-extern void fpga_init(void);
-extern int fpga_add(fpga_type devtype, void *desc);
-extern int fpga_count(void);
-extern int fpga_load(int devnum, const void *buf, size_t bsize,
-		     bitstream_type bstype);
-extern int fpga_fsload(int devnum, const void *buf, size_t size,
-		       fpga_fs_info *fpga_fsinfo);
-extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
-			      bitstream_type bstype);
-extern int fpga_dump(int devnum, const void *buf, size_t bsize);
-extern int fpga_info(int devnum);
-extern const fpga_desc *const fpga_validate(int devnum, const void *buf,
-					    size_t bsize, char *fn);
+void fpga_init(void);
+int fpga_add(fpga_type devtype, void *desc);
+int fpga_count(void);
+int fpga_load(int devnum, const void *buf, size_t bsize,
+	      bitstream_type bstype);
+int fpga_fsload(int devnum, const void *buf, size_t size,
+		fpga_fs_info *fpga_fsinfo);
+int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
+		       bitstream_type bstype);
+int fpga_dump(int devnum, const void *buf, size_t bsize);
+int fpga_info(int devnum);
+const fpga_desc *const fpga_validate(int devnum, const void *buf,
+				     size_t bsize, char *fn);

 #endif	/* _FPGA_H_ */
--
1.8.2.3

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[U-Boot] [PATCH 03/11] fpga: Export fpga_get_desc for SPL

[Michal Simek]

SPL needs to detect FPGA device which will be used
for loading bitstream.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 drivers/fpga/fpga.c | 2 +-
 include/fpga.h      | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index 37946d5e183a..d94eb5cc25c4 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -38,7 +38,7 @@ static void fpga_no_sup(char *fn, char *msg)
 /* fpga_get_desc
  *	map a device number to a descriptor
  */
-static const fpga_desc *const fpga_get_desc(int devnum)
+const fpga_desc *const fpga_get_desc(int devnum)
 {
 	fpga_desc *desc = (fpga_desc *)NULL;

diff --git a/include/fpga.h b/include/fpga.h
index ef044e936294..e0d12981b283 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -52,6 +52,7 @@ typedef enum {
 void fpga_init(void);
 int fpga_add(fpga_type devtype, void *desc);
 int fpga_count(void);
+const fpga_desc *const fpga_get_desc(int devnum);
 int fpga_load(int devnum, const void *buf, size_t bsize,
 	      bitstream_type bstype);
 int fpga_fsload(int devnum, const void *buf, size_t size,
--
1.8.2.3

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[U-Boot] [PATCH 04/11] fpga: xilinx: spartan2: Setup NULL fpga_op without driver

[Michal Simek]

Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 include/spartan2.h | 38 +++++++++++++++++++++++++++-----------
 1 file changed, 27 insertions(+), 11 deletions(-)

diff --git a/include/spartan2.h b/include/spartan2.h
index 2aca954e73ab..14606c303180 100644
--- a/include/spartan2.h
+++ b/include/spartan2.h
@@ -38,7 +38,12 @@ typedef struct {
 	xilinx_post_fn	post;
 } xilinx_spartan2_slave_serial_fns;

+#if defined(CONFIG_FPGA_SPARTAN2)
 extern struct xilinx_fpga_op spartan2_op;
+# define FPGA_SPARTAN2_OPS	&spartan2_op
+#else
+# define FPGA_SPARTAN2_OPS	NULL
+#endif

 /* Device Image Sizes
  *********************************************************************/
@@ -61,36 +66,47 @@ extern struct xilinx_fpga_op spartan2_op;
  *********************************************************************/
 /* Spartan-II devices */
 #define XILINX_XC2S15_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S15_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #define XILINX_XC2S30_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S30_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #define XILINX_XC2S50_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S50_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #define XILINX_XC2S100_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S100_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, &spartan2_op }
+{ xilinx_spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN2_OPS }

 #endif /* _SPARTAN2_H_ */
--
1.8.2.3

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[U-Boot] [PATCH 05/11] fpga: xilinx: spartan3: Setup NULL fpga_op without driver

[Michal Simek]

Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 include/spartan3.h | 45 +++++++++++++++++++++++++++++++--------------
 1 file changed, 31 insertions(+), 14 deletions(-)

diff --git a/include/spartan3.h b/include/spartan3.h
index d6d67a6e560c..fcb27b01e4a7 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -40,7 +40,12 @@ typedef struct {
 	xilinx_abort_fn abort;
 } xilinx_spartan3_slave_serial_fns;

+#if defined(CONFIG_FPGA_SPARTAN3)
 extern struct xilinx_fpga_op spartan3_op;
+# define FPGA_SPARTAN3_OPS	&spartan3_op
+#else
+# define FPGA_SPARTAN3_OPS	NULL
+#endif

 /* Device Image Sizes
  *********************************************************************/
@@ -71,48 +76,60 @@ extern struct xilinx_fpga_op spartan3_op;
  *********************************************************************/
 /* Spartan-III devices */
 #define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S200_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S400_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S1000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S1500_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 /* Spartan-3E devices */
 #define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
 { xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie, \
-	&spartan3_op }
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
 { xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie, \
-	&spartan3_op }
+	FPGA_SPARTAN3_OPS }

 #define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \
-{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie, &spartan3_op }
+{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie, \
+	FPGA_SPARTAN3_OPS }

 #endif /* _SPARTAN3_H_ */
--
1.8.2.3

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[U-Boot] [PATCH 06/11] fpga: xilinx: virtex2: Setup NULL fpga_op without driver

[Michal Simek]

Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 include/virtex2.h | 45 +++++++++++++++++++++++++++++++--------------
 1 file changed, 31 insertions(+), 14 deletions(-)

diff --git a/include/virtex2.h b/include/virtex2.h
index 7b7825f513e3..5944bbcb61b8 100644
--- a/include/virtex2.h
+++ b/include/virtex2.h
@@ -11,8 +11,6 @@

 #include <xilinx.h>

-extern struct xilinx_fpga_op virtex2_op;
-
 /*
  * Slave SelectMap Implementation function table.
  */
@@ -40,6 +38,13 @@ typedef struct {
 	xilinx_wdata_fn	wdata;
 } xilinx_virtex2_slave_serial_fns;

+#if defined(CONFIG_FPGA_VIRTEX2)
+extern struct xilinx_fpga_op virtex2_op;
+# define FPGA_VIRTEX2_OPS	&virtex2_op
+#else
+# define FPGA_VIRTEX2_OPS	NULL
+#endif
+
 /* Device Image Sizes (in bytes)
  *********************************************************************/
 #define XILINX_XC2V40_SIZE		(338208 / 8)
@@ -58,39 +63,51 @@ typedef struct {
 /* Descriptor Macros
  *********************************************************************/
 #define XILINX_XC2V40_DESC(iface, fn_table, cookie)	\
-{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \
-{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, &virtex2_op }
+{ xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie, \
+	FPGA_VIRTEX2_OPS }

 #endif /* _VIRTEX2_H_ */
--
1.8.2.3

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[U-Boot] [PATCH 07/11] fpga: xilinx: virtex2: Fix macro indentation

[Michal Simek]

No functional changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 include/virtex2.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/virtex2.h b/include/virtex2.h
index 5944bbcb61b8..503df9abaeaa 100644
--- a/include/virtex2.h
+++ b/include/virtex2.h
@@ -47,10 +47,10 @@ extern struct xilinx_fpga_op virtex2_op;

 /* Device Image Sizes (in bytes)
  *********************************************************************/
-#define XILINX_XC2V40_SIZE		(338208 / 8)
-#define XILINX_XC2V80_SIZE		(597408 / 8)
-#define XILINX_XC2V250_SIZE		(1591584 / 8)
-#define XILINX_XC2V500_SIZE		(2557857 / 8)
+#define XILINX_XC2V40_SIZE	(338208 / 8)
+#define XILINX_XC2V80_SIZE	(597408 / 8)
+#define XILINX_XC2V250_SIZE	(1591584 / 8)
+#define XILINX_XC2V500_SIZE	(2557857 / 8)
 #define XILINX_XC2V1000_SIZE	(3749408 / 8)
 #define XILINX_XC2V1500_SIZE	(5166240 / 8)
 #define XILINX_XC2V2000_SIZE	(6808352 / 8)
--
1.8.2.3

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[U-Boot] [PATCH 08/11] fpga: xilinx: zynqpl: Setup NULL fpga_op without driver

[Michal Simek]

Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not added

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 include/zynqpl.h | 23 +++++++++++++++++------
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/include/zynqpl.h b/include/zynqpl.h
index 8a9ec3297fbe..d0ff0d9a8bda 100644
--- a/include/zynqpl.h
+++ b/include/zynqpl.h
@@ -12,7 +12,12 @@

 #include <xilinx.h>

+#if defined(CONFIG_FPGA_ZYNQPL)
 extern struct xilinx_fpga_op zynq_op;
+# define FPGA_ZYNQPL_OPS	&zynq_op
+#else
+# define FPGA_ZYNQPL_OPS	NULL
+#endif

 #define XILINX_ZYNQ_7010	0x2
 #define XILINX_ZYNQ_7015	0x1b
@@ -31,21 +36,27 @@ extern struct xilinx_fpga_op zynq_op;

 /* Descriptor Macros */
 #define XILINX_XC7Z010_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, &zynq_op, "7z010" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z010" }

 #define XILINX_XC7Z015_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, &zynq_op, "7z015" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z015" }

 #define XILINX_XC7Z020_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, &zynq_op, "7z020" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z020" }

 #define XILINX_XC7Z030_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, &zynq_op, "7z030" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z030" }

 #define XILINX_XC7Z045_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, &zynq_op, "7z045" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z045" }

 #define XILINX_XC7Z100_DESC(cookie) \
-{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, &zynq_op, "7z100" }
+{ xilinx_zynq, devcfg, XILINX_XC7Z100_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z100" }

 #endif /* _ZYNQPL_H_ */
--
1.8.2.3

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[U-Boot] [PATCH 09/11] fpga: xilinx: Check if fpga operations are defined

[Michal Simek]

Ensure that operations are correctly setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 drivers/fpga/xilinx.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index adb4b8cd25fd..9c95148b25c1 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -139,6 +139,11 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
 		return FPGA_FAIL;
 	}

+	if (!desc->operations || !desc->operations->load) {
+		printf("%s: Missing load operation\n", __func__);
+		return FPGA_FAIL;
+	}
+
 	return desc->operations->load(desc, buf, bsize, bstype);
 }

@@ -151,8 +156,10 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
 		return FPGA_FAIL;
 	}

-	if (!desc->operations->loadfs)
+	if (!desc->operations || !desc->operations->loadfs) {
+		printf("%s: Missing loadfs operation\n", __func__);
 		return FPGA_FAIL;
+	}

 	return desc->operations->loadfs(desc, buf, bsize, fpga_fsinfo);
 }
@@ -165,6 +172,11 @@ int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)
 		return FPGA_FAIL;
 	}

+	if (!desc->operations || !desc->operations->dump) {
+		printf("%s: Missing dump operation\n", __func__);
+		return FPGA_FAIL;
+	}
+
 	return desc->operations->dump(desc, buf, bsize);
 }

@@ -228,7 +240,8 @@ int xilinx_info(xilinx_desc *desc)

 		if (desc->iface_fns) {
 			printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
-			desc->operations->info(desc);
+			if (desc->operations && desc->operations->info)
+				desc->operations->info(desc);
 		} else
 			printf ("No Device Function Table.\n");

--
1.8.2.3

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[U-Boot] [PATCH 09/11] fpga: xilinx: Check if fpga operations are defined

[Simon Glass]

On 14 January 2015 at 01:04, Michal Simek <michal.simek@xilinx.com> wrote:
> Ensure that operations are correctly setup.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Reviewed-by: Simon Glass <sjg@chromium.org>

(comment below)

> ---
>
>  drivers/fpga/xilinx.c | 17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
> index adb4b8cd25fd..9c95148b25c1 100644
> --- a/drivers/fpga/xilinx.c
> +++ b/drivers/fpga/xilinx.c
> @@ -139,6 +139,11 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
>                 return FPGA_FAIL;
>         }
>
> +       if (!desc->operations || !desc->operations->load) {
> +               printf("%s: Missing load operation\n", __func__);
> +               return FPGA_FAIL;

I wonder if these error codes should be dropped in favour of the
standard ones? Perhaps in a separate patch. E.g. here we could use
-ENOSYS.

> +       }
> +
>         return desc->operations->load(desc, buf, bsize, bstype);
>  }
>
> @@ -151,8 +156,10 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
>                 return FPGA_FAIL;
>         }
>
> -       if (!desc->operations->loadfs)
> +       if (!desc->operations || !desc->operations->loadfs) {
> +               printf("%s: Missing loadfs operation\n", __func__);
>                 return FPGA_FAIL;
> +       }
>
>         return desc->operations->loadfs(desc, buf, bsize, fpga_fsinfo);
>  }
> @@ -165,6 +172,11 @@ int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)
>                 return FPGA_FAIL;
>         }
>
> +       if (!desc->operations || !desc->operations->dump) {
> +               printf("%s: Missing dump operation\n", __func__);
> +               return FPGA_FAIL;
> +       }
> +
>         return desc->operations->dump(desc, buf, bsize);
>  }
>
> @@ -228,7 +240,8 @@ int xilinx_info(xilinx_desc *desc)
>
>                 if (desc->iface_fns) {
>                         printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
> -                       desc->operations->info(desc);
> +                       if (desc->operations && desc->operations->info)
> +                               desc->operations->info(desc);
>                 } else
>                         printf ("No Device Function Table.\n");
>
> --
> 1.8.2.3
>

Regards,
Simon

[U-Boot] [PATCH 09/11] fpga: xilinx: Check if fpga operations are defined

[Michal Simek]

On 01/14/2015 04:14 PM, Simon Glass wrote:
> On 14 January 2015 at 01:04, Michal Simek <michal.simek@xilinx.com> wrote:
>> Ensure that operations are correctly setup.
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> 
> Reviewed-by: Simon Glass <sjg@chromium.org>
> 
> (comment below)
> 
>> ---
>>
>>  drivers/fpga/xilinx.c | 17 +++++++++++++++--
>>  1 file changed, 15 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
>> index adb4b8cd25fd..9c95148b25c1 100644
>> --- a/drivers/fpga/xilinx.c
>> +++ b/drivers/fpga/xilinx.c
>> @@ -139,6 +139,11 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
>>                 return FPGA_FAIL;
>>         }
>>
>> +       if (!desc->operations || !desc->operations->load) {
>> +               printf("%s: Missing load operation\n", __func__);
>> +               return FPGA_FAIL;
> 
> I wonder if these error codes should be dropped in favour of the
> standard ones? Perhaps in a separate patch. E.g. here we could use
> -ENOSYS.

Definitely. They are bogus.

Thanks,
Michal


-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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[U-Boot] [PATCH 10/11] fpga: xilinx: Show fpga info if defined

[Michal Simek]

Show fpga_op->info even if desc->iface_fns is not defined.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 drivers/fpga/xilinx.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 9c95148b25c1..c765a74a25e0 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -238,13 +238,14 @@ int xilinx_info(xilinx_desc *desc)
 		if (desc->name)
 			printf("Device name:   \t%s\n", desc->name);

-		if (desc->iface_fns) {
+		if (desc->iface_fns)
 			printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
-			if (desc->operations && desc->operations->info)
-				desc->operations->info(desc);
-		} else
+		else
 			printf ("No Device Function Table.\n");

+		if (desc->operations && desc->operations->info)
+			desc->operations->info(desc);
+
 		ret_val = FPGA_SUCCESS;
 	} else {
 		printf ("%s: Invalid device descriptor\n", __FUNCTION__);
--
1.8.2.3

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[U-Boot] [PATCH 10/11] fpga: xilinx: Show fpga info if defined

[Simon Glass]

On 14 January 2015 at 01:04, Michal Simek <michal.simek@xilinx.com> wrote:
> Show fpga_op->info even if desc->iface_fns is not defined.
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Reviewed-by: Simon Glass <sjg@chromium.org>

> ---
>
>  drivers/fpga/xilinx.c | 9 +++++----
>  1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
> index 9c95148b25c1..c765a74a25e0 100644
> --- a/drivers/fpga/xilinx.c
> +++ b/drivers/fpga/xilinx.c
> @@ -238,13 +238,14 @@ int xilinx_info(xilinx_desc *desc)
>                 if (desc->name)
>                         printf("Device name:   \t%s\n", desc->name);
>
> -               if (desc->iface_fns) {
> +               if (desc->iface_fns)
>                         printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
> -                       if (desc->operations && desc->operations->info)
> -                               desc->operations->info(desc);
> -               } else
> +               else
>                         printf ("No Device Function Table.\n");
>
> +               if (desc->operations && desc->operations->info)
> +                       desc->operations->info(desc);
> +
>                 ret_val = FPGA_SUCCESS;
>         } else {
>                 printf ("%s: Invalid device descriptor\n", __FUNCTION__);
> --
> 1.8.2.3
>

[U-Boot] [PATCH 11/11] fpga: zynqpl: Add support for zc7035

[Michal Simek]

From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

Added support for zc7035

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 board/xilinx/zynq/board.c | 4 ++++
 include/zynqpl.h          | 6 ++++++
 2 files changed, 10 insertions(+)

diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 258632e52b0b..3a2198f8e830 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -24,6 +24,7 @@ static xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
 static xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
 static xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
 static xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
+static xilinx_desc fpga035 = XILINX_XC7Z035_DESC(0x35);
 static xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
 static xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
 #endif
@@ -49,6 +50,9 @@ int board_init(void)
 	case XILINX_ZYNQ_7030:
 		fpga = fpga030;
 		break;
+	case XILINX_ZYNQ_7035:
+		fpga = fpga035;
+		break;
 	case XILINX_ZYNQ_7045:
 		fpga = fpga045;
 		break;
diff --git a/include/zynqpl.h b/include/zynqpl.h
index d0ff0d9a8bda..1d37a51a04ef 100644
--- a/include/zynqpl.h
+++ b/include/zynqpl.h
@@ -23,6 +23,7 @@ extern struct xilinx_fpga_op zynq_op;
 #define XILINX_ZYNQ_7015	0x1b
 #define XILINX_ZYNQ_7020	0x7
 #define XILINX_ZYNQ_7030	0xc
+#define XILINX_ZYNQ_7035	0x12
 #define XILINX_ZYNQ_7045	0x11
 #define XILINX_ZYNQ_7100	0x16

@@ -31,6 +32,7 @@ extern struct xilinx_fpga_op zynq_op;
 #define XILINX_XC7Z015_SIZE	28085344/8
 #define XILINX_XC7Z020_SIZE	32364512/8
 #define XILINX_XC7Z030_SIZE	47839328/8
+#define XILINX_XC7Z035_SIZE	106571232/8
 #define XILINX_XC7Z045_SIZE	106571232/8
 #define XILINX_XC7Z100_SIZE	139330784/8

@@ -51,6 +53,10 @@ extern struct xilinx_fpga_op zynq_op;
 { xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
 	"7z030" }

+#define XILINX_XC7Z035_DESC(cookie) \
+{ xilinx_zynq, devcfg, XILINX_XC7Z035_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
+	"7z035" }
+
 #define XILINX_XC7Z045_DESC(cookie) \
 { xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, FPGA_ZYNQPL_OPS, \
 	"7z045" }
--
1.8.2.3

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[U-Boot] [PATCH 01/11] fpga: Protect GZIP usage when LOADMK is enabled

[Simon Glass]

On 14 January 2015 at 01:04, Michal Simek <michal.simek@xilinx.com> wrote:
> For case where CMD_FPGA_LOADMK is enabled and GZIP disable.
>
> Warning log:
> common/built-in.o: In function `do_fpga':
> /mnt/disk/u-boot/common/cmd_fpga.c:218: undefined reference to `gunzip'
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Reviewed-by: Simon Glass <sjg@chromium.org>