From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Wed, 14 Jan 2015 08:14:20 -0800
Subject: [U-Boot] [PATCH v2 1/2] Errata/ARM57: Add basic constructs to
 handle and apply A57 specific erratas
In-Reply-To: <1421243215-4277-1-git-send-email-bhupesh.sharma@freescale.com>
References: <1421243215-4277-1-git-send-email-bhupesh.sharma@freescale.com>
Message-ID: <54B695DC.2040302@freescale.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de



On 01/14/2015 05:46 AM, Bhupesh Sharma wrote:
> This patch adds basic constructs in the ARMv8 u-boot code
> to handle and apply Cortex-A57 specific erratas.
> 
> As and example, the framework showcases how erratas 833069, 826974
> and 828024 can be handled and applied.
> 
> Later on this framework can be extended to include other
> erratas.
> 
> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
> ---
> Changes from v1:
> 	- Addressed York's comment about x29 usage and calling the
> 	  core errata fxup function before the lowlevel_init function
> 	  is called.
> 
>  arch/arm/cpu/armv8/start.S   |   51 ++++++++++++++++++++++++++++++++++++++++++
>  arch/arm/include/asm/macro.h |   20 +++++++++++++++++
>  2 files changed, 71 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S
> index 4b11aa4..df532f9 100644
> --- a/arch/arm/cpu/armv8/start.S
> +++ b/arch/arm/cpu/armv8/start.S
> @@ -67,6 +67,9 @@ reset:
>  	msr	cpacr_el1, x0			/* Enable FP/SIMD */
>  0:
>  
> +	/* Apply ARM core specific erratas */
> +	bl	apply_core_errata
> +
>  	/*
>  	 * Cache/BPB/TLB Invalidate
>  	 * i-cache is invalidated before enabled in icache_enable()
> @@ -97,6 +100,54 @@ master_cpu:
>  
>  /*-----------------------------------------------------------------------*/
>  
> +WEAK(apply_core_errata)
> +
> +	/* For now, we support Cortex-A57 specific errata only */
> +
> +	/* Check if we are running on a Cortex-A57 core */
> +	branch_if_a57_core x0, 1f
> +	b	2f
> +1:
> +	bl	apply_a57_core_errata
> +
> +2:
> +	ret
> +ENDPROC(apply_core_errata)
> +

Bhupesh,

Have you tested the new code? I don't think it handles LR correctly. Your code
will be stuck.

York