From mboxrd@z Thu Jan 1 00:00:00 1970 From: Joonyoung Shim Date: Thu, 15 Jan 2015 10:29:42 +0900 Subject: [U-Boot] [PATCH 3/4] Exynos5: Use clock_get_periph_rate generic API In-Reply-To: <1421242536-4209-4-git-send-email-akshay.s@samsung.com> References: <1421242536-4209-1-git-send-email-akshay.s@samsung.com> <1421242536-4209-4-git-send-email-akshay.s@samsung.com> Message-ID: <54B71806.20102@samsung.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, On 01/14/2015 10:35 PM, Akshay Saraswat wrote: > Replacing SoC and peripheral specific function calls with generic > clock_get_periph_rate calls to get the peripheral clocks. > > Signed-off-by: Akshay Saraswat > --- > arch/arm/cpu/armv7/exynos/clock.c | 60 +++++++++++++++++++++++++++++++-------- > 1 file changed, 48 insertions(+), 12 deletions(-) > > diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c > index 9ac4579..9c719aa 100644 > --- a/arch/arm/cpu/armv7/exynos/clock.c > +++ b/arch/arm/cpu/armv7/exynos/clock.c > @@ -406,10 +406,13 @@ static unsigned long exynos5_get_periph_rate(int peripheral) > break; > case PERIPH_ID_SDMMC0: > case PERIPH_ID_SDMMC1: > + src = readl(&clk->src_fsys); > + div = readl(&clk->div_fsys1); > + break; > case PERIPH_ID_SDMMC2: > case PERIPH_ID_SDMMC3: > src = readl(&clk->src_fsys); > - div = readl(&clk->div_fsys1); > + div = readl(&clk->div_fsys2); > break; > case PERIPH_ID_I2C0: > case PERIPH_ID_I2C1: > @@ -450,8 +453,7 @@ static unsigned long exynos5_get_periph_rate(int peripheral) > sub_div = (div >> bit_info->div_bit) & 0xf; > sub_clk = sclk / (sub_div + 1); > > - /* Pre-ratio clock division for SDMMC0 and 2 */ > - if (peripheral == PERIPH_ID_SDMMC0 || peripheral == PERIPH_ID_SDMMC2) { > + if (bit_info->prediv_bit >= 0) { > div = (div >> bit_info->prediv_bit) & 0xff; > return sub_clk / (div + 1); > } Above changes seem to just fix, please make separate patch. Thanks.