From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Thu, 15 Jan 2015 11:15:41 -0800 Subject: [U-Boot] [PATCH v2 1/2] Errata/ARM57: Add basic constructs to handle and apply A57 specific erratas In-Reply-To: <20150115190515.GA20171@leverpostej> References: <1421243215-4277-1-git-send-email-bhupesh.sharma@freescale.com> <54B695DC.2040302@freescale.com> <20150115190515.GA20171@leverpostej> Message-ID: <54B811DD.90709@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 01/15/2015 11:05 AM, Mark Rutland wrote: > On Thu, Jan 15, 2015 at 06:10:57AM +0000, bhupesh.sharma at freescale.com wrote: >> Hi York, >> >>> -----Original Message----- >>> From: Sun York-R58495 >>> Sent: Wednesday, January 14, 2015 9:44 PM >>> On 01/14/2015 05:46 AM, Bhupesh Sharma wrote: >>>> This patch adds basic constructs in the ARMv8 u-boot code to handle >>>> and apply Cortex-A57 specific erratas. >>>> >>>> As and example, the framework showcases how erratas 833069, 826974 and >>>> 828024 can be handled and applied. >>>> >>>> Later on this framework can be extended to include other erratas. >>>> >>>> Signed-off-by: Bhupesh Sharma >>>> --- >>>> Changes from v1: >>>> - Addressed York's comment about x29 usage and calling the >>>> core errata fxup function before the lowlevel_init function >>>> is called. >>>> >>>> arch/arm/cpu/armv8/start.S | 51 >>> ++++++++++++++++++++++++++++++++++++++++++ >>>> arch/arm/include/asm/macro.h | 20 +++++++++++++++++ >>>> 2 files changed, 71 insertions(+) >>>> >>>> diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S >>>> index 4b11aa4..df532f9 100644 >>>> --- a/arch/arm/cpu/armv8/start.S >>>> +++ b/arch/arm/cpu/armv8/start.S >>>> @@ -67,6 +67,9 @@ reset: >>>> msr cpacr_el1, x0 /* Enable FP/SIMD */ >>>> 0: >>>> >>>> + /* Apply ARM core specific erratas */ >>>> + bl apply_core_errata >>>> + >>>> /* >>>> * Cache/BPB/TLB Invalidate >>>> * i-cache is invalidated before enabled in icache_enable() @@ - >>> 97,6 >>>> +100,54 @@ master_cpu: >>>> >>>> >>>> /*-------------------------------------------------------------------- >>>> ---*/ >>>> >>>> +WEAK(apply_core_errata) >>>> + >>>> + /* For now, we support Cortex-A57 specific errata only */ >>>> + >>>> + /* Check if we are running on a Cortex-A57 core */ >>>> + branch_if_a57_core x0, 1f >>>> + b 2f >>>> +1: >>>> + bl apply_a57_core_errata >>>> + >>>> +2: >>>> + ret >>>> +ENDPROC(apply_core_errata) >>>> + >>> >>> Bhupesh, >>> >>> Have you tested the new code? I don't think it handles LR correctly. Your >>> code will be stuck. >>> >> >> Yes, I have tested this on both the LS2085A simulator and emulator platforms. >> On emulator I tried u-boot boot-to-prompt and on simulator I tried linux boot-to-prompt. >> Both seem to be working fine. > > Has the apply_a57_core_errata function definitely been called in your > tests? > > If so the lr should point immediately after it (i.e. at the ret), and so > the ret should branch to itself, repeatedly. > That's what I thought. I wonder how Bhupesh tested on the simulator. York