From mboxrd@z Thu Jan 1 00:00:00 1970 From: Frank Bormann Date: Tue, 27 Jan 2015 13:56:12 -0500 Subject: [U-Boot] [RFC PATCH] ARM: Activate hypervisor mode for TI am5726 (OMAP5/dra7) Message-ID: <54C7DF4C.3010005@zoho.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, I was wondering if I could have any input on the patch below activating hypervisor mode on TI OMAP5-based SoC. The patch essentially uses the on-chip ROM code API to enable hypervisor mode on the primary A15 core and goes in tandem with a Linux kernel patch recently accepted into omap-for-v3.19/fixes that checks hypervisor mode on the primary A15 core and sets it accordingly on additional cores being activated. I am aware that there is some development going on for ARM's PSCI that amongst other things is supposed to deal with hypervisor activation in a more generic fashion and I am wondering if there is any preference on how to properly activate hypervisor mode for the TI SoCs mentioned above. Thanks, Frank --------------- u-boot patch: Enable hypervisor mode for AM5726 --- arch/arm/cpu/armv7/omap-common/lowlevel_init.S | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S index 86c0e42..696da4b 100644 --- a/arch/arm/cpu/armv7/omap-common/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap-common/lowlevel_init.S @@ -19,7 +19,20 @@ ENTRY(save_boot_params) ldr r1, =OMAP_SRAM_SCRATCH_BOOT_PARAMS str r0, [r1] +/* + * Turn on hypervisor mode on CPU#0 + */ +#ifdef CONFIG_DRA7XX_HYPERVISOR_ON + mov r0, lr @ This is a great place to switch into hyp mode + @ only the r0 was needed from _start and is now + @ free; all other general purpose registers were + @ already free. + ldr r12, =0x102 @ Set PL310 control register - value in R0 + .word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5 + @ call ROM Code API to set control register +#else bx lr +#endif /* CONFIG_DRA7XX_HYPERVISOR_ON */ ENDPROC(save_boot_params) ENTRY(set_pl310_ctrl_reg) --------------- Link to the corresponding Linux kernel patch: http://linux-kernel.2935.n7.nabble.com/PATCH-ARM-omap5-dra7xx-Enable-booting-secondary-CPU-in-HYP-mode-td1009407.html#a1014616