From: Joonyoung Shim <jy0922.shim@samsung.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 0/7] Exynos5: Fix warnings and enrich clock_get_periph_rate
Date: Wed, 04 Feb 2015 14:33:29 +0900 [thread overview]
Message-ID: <54D1AF29.6090603@samsung.com> (raw)
In-Reply-To: <1422952026-12292-1-git-send-email-akshay.s@samsung.com>
Hi,
On 02/03/2015 05:26 PM, Akshay Saraswat wrote:
> This patch series does following changes -
> 1. Removing compiler warnings for clock_get_periph_rate.
> 2. Adding and enabling support for Exynos542x in
> clock_get_periph_rate.
> 3. Replacing peripheral specific function calls with
> clock_get_periph_rate.
> 4. Remove code from clocks file which became useless due to
> introduction of clock_get_periph_rate.
>
> Changes since v4:
> - Added Reviewed-by in patches 3 and 5.
> - Split patch 6 of version 4 into two patches 6 and 7.
>
> Changes since v3:
> - Added Reviewed-by & Tested-by in patches 1, 2 and 4.
> - Patch-3: Handled SPLL case in exynos542x_get_periph_rate.
> - Patch-3: Changed EXYNOS542x -> EXYNOS542X in pll_src_bit enum.
> - Merged pathces 5 and 6 of version 3.
> - Patch-6: New patch for dealing with variety of mask bits.
>
> Changes since v2:
> - Patch-1: Added debug message for unknown periph IDs.
> - Patch-2: Changed exynos5420 -> exynos542x in comment.
> - Patch-3: Fixed enum and soc_get_periph_rate switch.
> - Patch-3: Added checks for negative values in soc_get_periph_rate.
> - Patch-4: Added checks for negative values in soc_get_periph_rate.
>
> Changes since v1:
> - Added 2 new patches.
>
>
> Akshay Saraswat (7):
> Exynos5: Fix compiler warnings due to clock_get_periph_rate
> Exynos542x: Move exynos5420_get_pll_clk up and rename
> Exynos542x: Add and enable get_periph_rate support
> Exynos5: Fix exynos5_get_periph_rate calculations
> Exynos5: Use clock_get_periph_rate generic API
> Exynos: clock: change mask bits as per peripheral
> Exynos: Clock: Cleanup soc_get_periph_rate
>
> arch/arm/cpu/armv7/exynos/clock.c | 619 ++++++++++++++++-----------------
> arch/arm/include/asm/arch-exynos/clk.h | 4 +
> 2 files changed, 296 insertions(+), 327 deletions(-)
>
I have minor comments about patch 7/7. Apart from that, this patchset is
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Thanks.
prev parent reply other threads:[~2015-02-04 5:33 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-03 8:26 [U-Boot] [PATCH v5 0/7] Exynos5: Fix warnings and enrich clock_get_periph_rate Akshay Saraswat
2015-02-03 8:27 ` [U-Boot] [PATCH v5 1/7] Exynos5: Fix compiler warnings due to clock_get_periph_rate Akshay Saraswat
2015-02-03 8:27 ` [U-Boot] [PATCH v5 2/7] Exynos542x: Move exynos5420_get_pll_clk up and rename Akshay Saraswat
2015-02-03 8:27 ` [U-Boot] [PATCH v5 3/7] Exynos542x: Add and enable get_periph_rate support Akshay Saraswat
2015-02-03 8:27 ` [U-Boot] [PATCH v5 4/7] Exynos5: Fix exynos5_get_periph_rate calculations Akshay Saraswat
2015-02-03 8:27 ` [U-Boot] [PATCH v5 5/7] Exynos5: Use clock_get_periph_rate generic API Akshay Saraswat
2015-02-03 8:27 ` [U-Boot] [PATCH v5 6/7] Exynos: clock: change mask bits as per peripheral Akshay Saraswat
2015-02-04 15:01 ` Simon Glass
2015-02-03 8:27 ` [U-Boot] [PATCH v5 7/7] Exynos: Clock: Cleanup soc_get_periph_rate Akshay Saraswat
2015-02-04 5:30 ` Joonyoung Shim
2015-02-04 5:33 ` Joonyoung Shim [this message]
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