From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dinh Nguyen Date: Mon, 9 Feb 2015 10:50:34 -0600 Subject: [U-Boot] [PATCHv1 13/22] arm: socfpga: spl: Add s_init In-Reply-To: <201502071434.16275.marex@denx.de> References: <1421253662-27222-1-git-send-email-dinguyen@opensource.altera.com> <201501150054.08701.marex@denx.de> <54D3DDCB.9010602@opensource.altera.com> <201502071434.16275.marex@denx.de> Message-ID: <54D8E55A.4010308@opensource.altera.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 02/07/2015 07:34 AM, Marek Vasut wrote: > On Thursday, February 05, 2015 at 10:16:59 PM, Dinh Nguyen wrote: >> On 01/14/2015 05:54 PM, Marek Vasut wrote: > > [...] > >>>> + /* >>>> + * Private components security >>>> + * U-Boot : configure private timer, global timer and cpu >>>> + * component access as non secure for kernel stage (as required >>>> + * by kernel) >>>> + */ >>>> + setbits_le32(SOCFPGA_SCU_SNSAC, 0xfff); >>> >>> We do this in socfpga/misc.c in arch_early_init_r() already. You should >>> consolidate this code so we don't have it twice I think. >> >> Yes, this can be removed. > > Hi! Please use whichever place you think is better. > >>>> + >>>> +#endif /* CONFIG_SPL_BUILD */ >>>> + >>>> + /* Configure the L2 controller to make SDRAM start at 0 */ >>>> + writel(0x1, (SOCFPGA_MPUL2_ADDRESS + SOCFPGA_MPUL2_ADRFLTR_START)); >>> >>> This as well. >> >> This call has to stay because we want to map the SDRAM to 0x0 in the >> SPL. The call in arch_early_init_r() is in u-boot, and thus is too late. > > Roger, but please remove the other invocation once the SPL is in place. OK? Yes, I can remove it in the series? Thanks, Dinh