From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] imx: mx6qsabreauto: Change to use common GPMI IO clock function
Date: Tue, 10 Feb 2015 11:57:20 +0100 [thread overview]
Message-ID: <54D9E410.60708@denx.de> (raw)
In-Reply-To: <1421055433-1330-1-git-send-email-B37916@freescale.com>
Hi,
On 12/01/2015 10:37, Ye.Li wrote:
> Since a clock function setup_gpmi_io_clk is implemented for GPMI
> IO clock settings, change to use this common function in GPMI setup.
>
> Signed-off-by: Ye.Li <B37916@freescale.com>
> ---
> board/freescale/mx6qsabreauto/mx6qsabreauto.c | 25 ++-----------------------
> 1 files changed, 2 insertions(+), 23 deletions(-)
>
> diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> index 59387ff..a90360f 100644
> --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> @@ -311,30 +311,9 @@ static void setup_gpmi_nand(void)
> /* config gpmi nand iomux */
> imx_iomux_v3_setup_multiple_pads(gpmi_pads, ARRAY_SIZE(gpmi_pads));
>
> - /* gate ENFC_CLK_ROOT clock first,before clk source switch */
> - clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
> - clrbits_le32(&mxc_ccm->CCGR4,
> - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK);
> -
> - /* config gpmi and bch clock to 100 MHz */
> - clrsetbits_le32(&mxc_ccm->cs2cdr,
> - MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK |
> - MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK |
> - MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK,
> - MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
> + setup_gpmi_io_clk((MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) |
> MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) |
> - MXC_CCM_CS2CDR_ENFC_CLK_SEL(3));
> -
> - /* enable ENFC_CLK_ROOT clock */
> - setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK);
> -
> - /* enable gpmi and bch clock gating */
> - setbits_le32(&mxc_ccm->CCGR4,
> - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK |
> - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK |
> - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK |
> - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK |
> - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET);
> + MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)));
>
> /* enable apbh clock gating */
> setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);
>
This is ok, but you see that if setup_gpmi_io_clk() is exapanded as in
your "mx6: clock: Modify GPMI clock to support mx6sx" (I understand that
it was protected by processor's config), it could be a problem. Anyway,
this is ok and will be merged.
Acked-by: Stefano Babic <sbabic@denx.de>
Best regards,
Stefano Babic
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next prev parent reply other threads:[~2015-02-10 10:57 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-12 9:37 [U-Boot] [PATCH] imx: mx6qsabreauto: Change to use common GPMI IO clock function Ye.Li
2015-02-10 10:57 ` Stefano Babic [this message]
2015-02-10 11:55 ` Stefano Babic
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