[U-Boot] [PATCH 1/4] mx6sx: pins: Enable SION for I2C3 iomux setting

Stefano Babic
2015-02-10T10:18:49Z

Hi,

On 09/02/2015 14:27, Li Ye-B37916 wrote:
> Hi Stefano, Nikolay,
>
> On 1/30/2015 1:54 AM, Stefano Babic wrote:
>> Hi,
>>
>> On 12/01/2015 11:37, Nikolay Dimitrov wrote:
>>> Hi Ye.Li,
>>>
>>> On 01/12/2015 10:46 AM, Ye.Li wrote:
>>>> The I2C SDA and SCL require the IOMUX SION bit set to get input signal.
>>>>
>>>> Signed-off-by: Ye.Li <B37916@freescale.com>
>>>> ---
>>>> arch/arm/include/asm/arch-mx6/mx6sx_pins.h | 4 ++--
>>>> 1 files changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/arch/arm/include/asm/arch-mx6/mx6sx_pins.h
>>>> b/arch/arm/include/asm/arch-mx6/mx6sx_pins.h
>>>> index 7c6c1e8..da8c698 100644
>>>> --- a/arch/arm/include/asm/arch-mx6/mx6sx_pins.h
>>>> +++ b/arch/arm/include/asm/arch-mx6/mx6sx_pins.h
>>>> @@ -420,7 +420,7 @@ enum {
>>>>
>>>> MX6_PAD_KEY_COL4__KPP_COL_4 =
>>>> IOMUX_PAD(0x03FC, 0x00B4, 0, 0x0000, 0, 0),
>>>> MX6_PAD_KEY_COL4__ENET2_MDC =
>>>> IOMUX_PAD(0x03FC, 0x00B4, 1, 0x0000, 0, 0),
>>>> - MX6_PAD_KEY_COL4__I2C3_SCL =
>>>> IOMUX_PAD(0x03FC, 0x00B4, 2, 0x07B8, 2, 0),
>>>> + MX6_PAD_KEY_COL4__I2C3_SCL =
>>>> IOMUX_PAD(0x03FC, 0x00B4, IOMUX_CONFIG_SION | 2, 0x07B8, 2, 0),
>>>> MX6_PAD_KEY_COL4__USDHC2_LCTL =
>>>> IOMUX_PAD(0x03FC, 0x00B4, 3, 0x0000, 0, 0),
>>>> MX6_PAD_KEY_COL4__AUDMUX_AUD5_RXC =
>>>> IOMUX_PAD(0x03FC, 0x00B4, 4, 0x0664, 0, 0),
>>>> MX6_PAD_KEY_COL4__GPIO2_IO_14 =
>>>> IOMUX_PAD(0x03FC, 0x00B4, 5, 0x0000, 0, 0),
>>>> @@ -467,7 +467,7 @@ enum {
>>>>
>>>> MX6_PAD_KEY_ROW4__KPP_ROW_4 =
>>>> IOMUX_PAD(0x0410, 0x00C8, 0, 0x0000, 0, 0),
>>>> MX6_PAD_KEY_ROW4__ENET2_MDIO =
>>>> IOMUX_PAD(0x0410, 0x00C8, 1, 0x0770, 3, 0),
>>>> - MX6_PAD_KEY_ROW4__I2C3_SDA =
>>>> IOMUX_PAD(0x0410, 0x00C8, 2, 0x07BC, 2, 0),
>>>> + MX6_PAD_KEY_ROW4__I2C3_SDA =
>>>> IOMUX_PAD(0x0410, 0x00C8, IOMUX_CONFIG_SION | 2, 0x07BC, 2, 0),
>>>> MX6_PAD_KEY_ROW4__USDHC1_LCTL =
>>>> IOMUX_PAD(0x0410, 0x00C8, 3, 0x0000, 0, 0),
>>>> MX6_PAD_KEY_ROW4__AUDMUX_AUD5_RXFS =
>>>> IOMUX_PAD(0x0410, 0x00C8, 4, 0x0668, 0, 0),
>>>> MX6_PAD_KEY_ROW4__GPIO2_IO_19 =
>>>> IOMUX_PAD(0x0410, 0x00C8, 5, 0x0000, 0, 0),
>>>>
>>> Usually the SCL is output-only, driven by the I2C master. Why do you
>>> need to enable SION bit on SCL, if the pin will be used as output-only?
>>>
>> Right - I do not see why SION should be set.
>>
>> Regards,
>> Stefano Babic
>>
>
> Setting SION to both SDA and SCL is required by i.MX6 reference manual. You can find the information below from i2c chapter.
>
> 34.2 External Signals
> This section discusses I2C signals that connect off-chip.
> For I2C compliance, all devices connected to the I2Cn_SCL and I2Cn_SDA signals must
> have open-drain or open-collector outputs. The logic AND function is implemented on
> both lines with external pull-up resistors.
> Inputs of I2Cn_SCL and I2Cn_SDA also need to be manually enabled by setting the
> SION bit in the IOMUX after the corresponding PADs are selected as I2C function.
>

Checked in manual, thanks for link. However, I have still a couple of
questions. The controller can work as slave or as master, and according
to the manual, the slave is the default after a reset. I understand that
putting the controller into slave mode must require the SION bit set.
Anyway, you are using I2C3 as master in your patch 4/4. Is it still
mandatory even in this case to set the SION bit ? The manual states that
to use the signal as input the SION bit must be set, but as far as I see
in the patchset SCL is output only.

Best regards,
Stefano Babic

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