From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefano Babic Date: Wed, 11 Feb 2015 13:48:57 +0100 Subject: [U-Boot] [PATCH 3/4] mx6: clock: Modify GPMI clock to support mx6sx In-Reply-To: <54DAC8FF.4030203@freescale.com> References: <1421052378-29913-1-git-send-email-B37916@freescale.com> <1421052378-29913-3-git-send-email-B37916@freescale.com> <54D9DCE0.4040800@denx.de> <54DAC8FF.4030203@freescale.com> Message-ID: <54DB4FB9.3040608@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Ye.Li, On 11/02/2015 04:14, Li Ye-B37916 wrote: >> > I feel you misunderstand the patch. Thanks for clarifications. > On i.MX6sx, the QSPI2 and GPMI shares the same clock root of QSPI2. So you can see the register bits are > named with "MXC_CCM_CS2CDR_QSPI2_xxx". Actually, not only the name, there is a little different in the CS2CDR register bits layout. The patch is used to fix the gap. > > Also the the GPMI pins are multiplexed with QSPI2 pins, so either NAND or QSPI2 can work, there is no conflict. Ok, understood - then it is fine with me. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================