From: Jan Kiszka <jan.kiszka@web.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/9] ARM: Factor out reusable psci_cpu_entry
Date: Sun, 15 Feb 2015 07:29:26 +0100 [thread overview]
Message-ID: <54E03CC6.7020509@web.de> (raw)
In-Reply-To: <CAGb2v64H1d52z+G2K1-Uix0j1s-Un+P_v8WrPRAEaP=WtEXQdg@mail.gmail.com>
On 2015-02-15 03:01, Chen-Yu Tsai wrote:
> Hi,
>
> On Sun, Feb 15, 2015 at 5:28 AM, Jan Kiszka <jan.kiszka@web.de> wrote:
>> From: Jan Kiszka <jan.kiszka@siemens.com>
>>
>> _sunxi_cpu_entry can be converted completely into a reusable
>> psci_cpu_entry. Tegra124 will use it as well.
>>
>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>> ---
>> arch/arm/cpu/armv7/psci.S | 19 +++++++++++++++++++
>> arch/arm/cpu/armv7/sunxi/psci.S | 21 ++-------------------
>> 2 files changed, 21 insertions(+), 19 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S
>> index d688607..e916d71 100644
>> --- a/arch/arm/cpu/armv7/psci.S
>> +++ b/arch/arm/cpu/armv7/psci.S
>> @@ -170,4 +170,23 @@ ENTRY(psci_cpu_off_common)
>> bx lr
>> ENDPROC(psci_cpu_off_common)
>>
>> +ENTRY(psci_cpu_entry)
>> + @ Set SMP bit
>> + mrc p15, 0, r0, c1, c0, 1 @ ACTLR
>> + orr r0, r0, #(1 << 6) @ Set SMP bit
>> + mcr p15, 0, r0, c1, c0, 1 @ ACTLR
>> + isb
>> +
>> + bl _nonsec_init
>> + bl psci_arch_init
>> +
>> + adr r0, _psci_target_pc
>> + ldr r0, [r0]
>> + b _do_nonsec_entry
>> +ENDPROC(psci_cpu_entry)
>> +
>> +.globl _psci_target_pc
>> +_psci_target_pc:
>> + .word 0
>
> The sunxi version didn't have a per-core target_pc variable.
> It is still the case here. Is this the correct way to implement
> it? I see per-core storage of this in some of the kernel's smp
> ops.
>
> On sunxi it works because the only platform using it only has
> one secondary core.
>
With homogeneous SMP, it probably works as well because reset vectors
may not differ across the cores. But this remains a valid point.
I'm considering to push this variable to the top of the per-CPU stack.
Calculating the stack position is actually another function to factor out.
Thanks,
Jan
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next prev parent reply other threads:[~2015-02-15 6:29 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-14 21:28 [U-Boot] [PATCH 0/9] Add PSCI support for Jetson TK1/Tegra124 Jan Kiszka
2015-02-14 21:28 ` [U-Boot] [PATCH 1/9] ARM: Factor out reusable psci_cpu_off_common Jan Kiszka
2015-02-14 21:28 ` [U-Boot] [PATCH 2/9] ARM: Factor out reusable psci_cpu_entry Jan Kiszka
2015-02-15 2:01 ` Chen-Yu Tsai
2015-02-15 6:29 ` Jan Kiszka [this message]
2015-02-15 9:46 ` Jan Kiszka
2015-02-14 21:28 ` [U-Boot] [PATCH 3/9] tegra124: Add more registers to struct mc_ctlr Jan Kiszka
2015-02-14 21:28 ` [U-Boot] [PATCH 4/9] virt-dt: Allow reservation of the secure region when it is in a RAM carveout Jan Kiszka
2015-02-14 21:28 ` [U-Boot] [PATCH 5/9] tegra: Make tegra_powergate_power_on public Jan Kiszka
2015-02-14 21:28 ` [U-Boot] [PATCH 6/9] tegra: Add ap_pm_init hook Jan Kiszka
2015-02-14 21:28 ` [U-Boot] [PATCH 7/9] tegra124: Add PSCI support for Tegra124 Jan Kiszka
2015-02-14 21:28 ` [U-Boot] [PATCH 8/9] jetson-tk1: Add PSCI configuration options and reserve secure code Jan Kiszka
2015-02-14 21:28 ` [U-Boot] [PATCH 9/9] tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0 Jan Kiszka
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