From: Stefano Babic <sbabic@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/4] mx6sx: pins: Enable SION for I2C3 iomux setting
Date: Sun, 15 Feb 2015 17:23:39 +0100 [thread overview]
Message-ID: <54E0C80B.5050309@denx.de> (raw)
In-Reply-To: <54E0B71B.1080505@mail.bg>
Hi everybody,
On 15/02/2015 16:11, Nikolay Dimitrov wrote:
>> Checked in manual, thanks for link. However, I have still a couple of
>> questions. The controller can work as slave or as master, and according
>> to the manual, the slave is the default after a reset. I understand that
>> putting the controller into slave mode must require the SION bit set.
>> Anyway, you are using I2C3 as master in your patch 4/4. Is it still
>> mandatory even in this case to set the SION bit ? The manual states that
>> to use the signal as input the SION bit must be set, but as far as I see
>> in the patchset SCL is output only.
>
> Just tested the behavior of SION bit on imx6sl (riotboard), as I don't
> have imx6sx hardware.
>
> For the test I used I2C4, located on expansion connector J13. I
> verified that the SION bits are enabled after boot:
>
> # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO07
> IOMUXC_SW_MUX_CTL_PAD_GPIO07:0x020e0238 =0x00000018
>
> # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO08
> IOMUXC_SW_MUX_CTL_PAD_GPIO08:0x020e023c =0x00000018
>
> I also verified that the I2C interface works as expected (by observing
> I2C transactions on a digital scope):
>
> i2cdetect -y 3
>
> This works so far. Then I disabled the SION bits for both iomuxes:
>
> # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO07 0x08
> IOMUXC_SW_MUX_CTL_PAD_GPIO07:0x020e0238 =0x00000018
> IOMUXC_SW_MUX_CTL_PAD_GPIO07:0x020e0238 == 0x00000018...0x00000008
>
> # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO08 0x08
> IOMUXC_SW_MUX_CTL_PAD_GPIO08:0x020e023c =0x00000018
> IOMUXC_SW_MUX_CTL_PAD_GPIO08:0x020e023c == 0x00000018...0x00000008
>
> Now interface I2C4 doesn't work anymore. Instead of complete I2C
> transactions, I see just a single pulses on both clock/data lines,
> repeated on each 500ms. At the same time i2cdetect scans the address
> space much more slowly than usual, and it looks like it timeouts on
> each single address check for the same amount of time (500ms).
>
> Restoring the SION bits for clock & data restores the I2C4
> functionality. All the time the port was in master mode.
>
> I don't have experience with imx6sx, but if the I2C IP core was reused
> for imx6sx (which is very likely), then I tend to agree with Ye Li that
> the SION bits will have to be enabled.
Thanks for testing and to share your experience. I will merge Li's patch
now.
Thanks again,
Stefano Babic
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prev parent reply other threads:[~2015-02-15 16:23 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-12 8:46 [U-Boot] [PATCH 1/4] mx6sx: pins: Enable SION for I2C3 iomux setting Ye.Li
2015-01-12 8:46 ` [U-Boot] [PATCH 2/4] mx6: soc: Add ENET2 support Ye.Li
2015-02-10 10:22 ` Stefano Babic
2015-02-11 2:42 ` Li Ye-B37916
2015-02-11 12:46 ` Stefano Babic
2015-01-12 8:46 ` [U-Boot] [PATCH 3/4] mx6: clock: Modify GPMI clock to support mx6sx Ye.Li
2015-02-10 10:26 ` Stefano Babic
2015-02-11 3:14 ` Li Ye-B37916
2015-02-11 12:48 ` Stefano Babic
2015-01-12 8:46 ` [U-Boot] [PATCH 4/4] imx: mx6sxsabreauto: Add support for mx6sx SABREAUTO board Ye.Li
2015-02-10 10:51 ` Stefano Babic
2015-02-11 9:43 ` Li Ye-B37916
2015-02-11 13:21 ` Peng Fan
2015-01-12 10:37 ` [U-Boot] [PATCH 1/4] mx6sx: pins: Enable SION for I2C3 iomux setting Nikolay Dimitrov
2015-01-29 17:54 ` Stefano Babic
2015-02-09 13:27 ` Li Ye-B37916
2015-02-10 10:18 ` Stefano Babic
2015-02-15 15:11 ` Nikolay Dimitrov
2015-02-15 16:23 ` Stefano Babic [this message]
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