From: Jan Kiszka <jan.kiszka@siemens.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 12/12] tegra: Set CNTFRQ for secondary CPUs
Date: Mon, 16 Feb 2015 15:02:07 +0100 [thread overview]
Message-ID: <54E1F85F.5040504@siemens.com> (raw)
In-Reply-To: <20150216135116.GE8994@leverpostej>
On 2015-02-16 14:51, Mark Rutland wrote:
> On Mon, Feb 16, 2015 at 01:44:36PM +0000, Jan Kiszka wrote:
>> On 2015-02-16 14:37, Mark Rutland wrote:
>>> On Mon, Feb 16, 2015 at 12:54:49PM +0000, Jan Kiszka wrote:
>>>> We only set CNTFRQ in arch_timer_init for the boot CPU. But this has to
>>>> happen for all cores.
>>>>
>>>> Fixing this resolves problems of KVM with emulating the generic
>>>> timer/counter.
>>>>
>>>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>>>> ---
>>>> arch/arm/cpu/armv7/tegra-common/psci.S | 13 +++++++++++++
>>>> 1 file changed, 13 insertions(+)
>>>>
>>>> diff --git a/arch/arm/cpu/armv7/tegra-common/psci.S b/arch/arm/cpu/armv7/tegra-common/psci.S
>>>> index b7501fb..119c246 100644
>>>> --- a/arch/arm/cpu/armv7/tegra-common/psci.S
>>>> +++ b/arch/arm/cpu/armv7/tegra-common/psci.S
>>>> @@ -51,12 +51,25 @@ ENTRY(psci_arch_init)
>>>>
>>>> mrc p15, 0, r4, c0, c0, 5 @ MPIDR
>>>> and r4, r4, #7 @ number of CPUs in cluster
>>>> +
>>>> + adr r5, _sys_clock_freq
>>>> + cmp r4, #0
>>>> +
>>>> + mrceq p15, 0, r7, c14, c0, 0 @ read CNTFRQ from CPU0
>>>> + streq r7, [r5]
>>>> +
>>>> + ldrne r7, [r5]
>>>> + mcrne p15, 0, r7, c14, c0, 0 @ write CNTFRQ to CPU1..3
>>>
>>> Is it not possible to have a hook that uses the same variable as
>>> arch_timer_init rather than doing a here copy? It seems a shame to
>>> duplicate the effort.
>>
>> The problem is related to the different address spaces. Here we run in
>> the secure monitor, arch_timer_init - to my understanding - in
>> non-secure mode. Didn't find a pattern so far how to transfer data (and
>> that shouldn't be more complex than the above code).
>
> Surely arch_timer_init must be run in a secure mode in order to be
> allowed to write to CNTFRQ?
Ah, right.
>
> If this is simply the easiest way of moving the data around then there's
> no real problem with it; it's just a shame that it only happens in the
> PSCI case.
OK, I'll check again. Maybe it's easier than I thought.
Jan
--
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux
next prev parent reply other threads:[~2015-02-16 14:02 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-16 12:54 [U-Boot] [PATCH v2 00/12] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 01/12] ARM: Factor out reusable psci_cpu_off_common Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 02/12] ARM: Factor out reusable psci_cpu_entry Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 03/12] ARM: Factor out reusable psci_get_cpu_stack_top Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 04/12] ARM: Put target PC for PSCI CPU_ON on per-CPU stack Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 05/12] tegra124: Add more registers to struct mc_ctlr Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 06/12] virt-dt: Allow reservation of the secure region when it is in a RAM carveout Jan Kiszka
2015-02-16 13:42 ` Mark Rutland
2015-02-16 13:51 ` Jan Kiszka
2015-02-16 14:25 ` Mark Rutland
2015-02-16 14:31 ` Jan Kiszka
2015-02-16 14:56 ` Mark Rutland
2015-02-16 15:38 ` Jan Kiszka
2015-02-17 8:09 ` Jan Kiszka
2015-02-17 10:46 ` Mark Rutland
2015-02-17 11:32 ` Jan Kiszka
2015-02-17 11:55 ` Mark Rutland
2015-02-19 8:28 ` Thierry Reding
2015-02-19 9:19 ` Ian Campbell
2015-02-19 9:25 ` Jan Kiszka
2015-02-19 10:13 ` Ian Campbell
2015-02-19 13:49 ` Mark Rutland
2015-02-19 10:22 ` Thierry Reding
2015-02-19 13:42 ` Mark Rutland
2015-02-19 10:34 ` Thierry Reding
2015-02-19 11:17 ` Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 07/12] tegra: Make tegra_powergate_power_on public Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 08/12] tegra: Add ap_pm_init hook Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 09/12] tegra124: Add PSCI support for Tegra124 Jan Kiszka
2015-02-17 21:03 ` Stephen Warren
2015-02-18 6:13 ` Jan Kiszka
2015-02-18 16:34 ` Stephen Warren
2015-02-19 9:14 ` Thierry Reding
2015-02-20 9:36 ` Jan Kiszka
2015-02-24 7:23 ` Jan Kiszka
2015-02-24 8:18 ` Thierry Reding
2015-02-24 8:23 ` Jan Kiszka
2015-02-19 8:57 ` Thierry Reding
2015-02-19 9:04 ` Thierry Reding
2015-02-16 12:54 ` [U-Boot] [PATCH v2 10/12] jetson-tk1: Add PSCI configuration options and reserve secure code Jan Kiszka
2015-02-17 21:05 ` Stephen Warren
2015-02-18 7:39 ` Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 11/12] tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0 Jan Kiszka
2015-02-16 13:49 ` Mark Rutland
2015-02-16 13:55 ` Jan Kiszka
2015-02-17 21:06 ` Stephen Warren
2015-02-18 7:24 ` Jan Kiszka
2015-02-16 12:54 ` [U-Boot] [PATCH v2 12/12] tegra: Set CNTFRQ for secondary CPUs Jan Kiszka
2015-02-16 13:37 ` Mark Rutland
2015-02-16 13:44 ` Jan Kiszka
2015-02-16 13:51 ` Mark Rutland
2015-02-16 14:02 ` Jan Kiszka [this message]
2015-02-17 7:01 ` Jan Kiszka
2015-02-17 10:21 ` Mark Rutland
2015-02-17 10:27 ` Jan Kiszka
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