From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Warren Date: Tue, 17 Feb 2015 14:05:42 -0700 Subject: [U-Boot] [PATCH v2 10/12] jetson-tk1: Add PSCI configuration options and reserve secure code In-Reply-To: References: Message-ID: <54E3AD26.5090905@wwwdotorg.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 02/16/2015 05:54 AM, Jan Kiszka wrote: > The secure world code is relocated to the MB just below the top of 4G, we > reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is > not protected in h/w. See next patch. > diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h > +#define CONFIG_ARMV7_PSCI 1 > +/* Reserve top 1M for secure RAM */ > +#define CONFIG_ARMV7_SECURE_BASE 0xfff00000 Can that not be dynamic? What if the system only has 1GB RAM not 2GB. It's true that all shipped/public versions of this board do have 2GB AFAIK, but we have had internal versions with different amounts of RAM, and I don't think there's anything else in Tegra U-Boots that hard-codes RAM sizes. > +#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000