From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Thu, 26 Feb 2015 10:17:48 -0800 Subject: [U-Boot] [PATCH] powerpc/T104xD4RDB: Add T1040/T1042D4RDB boards support In-Reply-To: <1422972044-29758-1-git-send-email-vijay.rai@freescale.com> References: <1422972044-29758-1-git-send-email-vijay.rai@freescale.com> Message-ID: <54EF634C.2000904@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 02/03/2015 06:00 AM, Vijay Rai wrote: > T1040D4RDB is a Freescale reference board that hosts the T1040 SoC. > It is similar to T1040RDB board with the following differences : > - Has DDR4 memory > - PHY ports have different PHY addresses > - RTC support > - Both QE-TDM and DIU connector > > T1040D4RDB supports 0x66 serdes protocol with following interfaces > - 2 RGMII's on DTSEC4, DTSEC5 > - 1 SGMII on DTSEC3 > > T1042D4RDB is variant of T1040D4RDB which hosts T1042 SoC > (Personality of T1040 without L2 switch) > T1042D4RDB supports 0x86 serdes protocol with following interfaces > - 2 RGMII's on DTSEC4, DTSEC5 > - 3 SGMII on DTSEC1, DTSEC2 & DTSEC3 > > Signed-off-by: Vijay Rai > Signed-off-by: Priyanka Jain > --- > board/freescale/t104xrdb/MAINTAINERS | 8 ++++++ > board/freescale/t104xrdb/ddr.c | 7 +++++ > board/freescale/t104xrdb/ddr.h | 12 ++++++++ > board/freescale/t104xrdb/eth.c | 20 +++++++++++-- > board/freescale/t104xrdb/t1040d4_rcw.cfg | 7 +++++ > board/freescale/t104xrdb/t1042d4_rcw.cfg | 7 +++++ > configs/T1040D4RDB_NAND_defconfig | 5 ++++ > configs/T1040D4RDB_SDCARD_defconfig | 5 ++++ > configs/T1040D4RDB_SPIFLASH_defconfig | 5 ++++ > configs/T1040D4RDB_defconfig | 4 +++ > configs/T1042D4RDB_NAND_defconfig | 5 ++++ > configs/T1042D4RDB_SDCARD_defconfig | 5 ++++ > configs/T1042D4RDB_SPIFLASH_defconfig | 5 ++++ > configs/T1042D4RDB_defconfig | 4 +++ > include/configs/T104xRDB.h | 46 ++++++++++++++++++++++++------ > 15 files changed, 134 insertions(+), 11 deletions(-) > create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg > create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg > create mode 100644 configs/T1040D4RDB_NAND_defconfig > create mode 100644 configs/T1040D4RDB_SDCARD_defconfig > create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig > create mode 100644 configs/T1040D4RDB_defconfig > create mode 100644 configs/T1042D4RDB_NAND_defconfig > create mode 100644 configs/T1042D4RDB_SDCARD_defconfig > create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig > create mode 100644 configs/T1042D4RDB_defconfig > > diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS > index 13d9be9..32e044f 100644 > --- a/board/freescale/t104xrdb/MAINTAINERS > +++ b/board/freescale/t104xrdb/MAINTAINERS > @@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h > F: configs/T1040RDB_defconfig > F: configs/T1040RDB_NAND_defconfig > F: configs/T1040RDB_SPIFLASH_defconfig > +F: configs/T1040D4RDB_defconfig > +F: configs/T1040D4RDB_NAND_defconfig > +F: configs/T1040D4RDB_SPIFLASH_defconfig > F: configs/T1042RDB_defconfig > +F: configs/T1042D4RDB_defconfig > +F: configs/T1042D4RDB_NAND_defconfig > +F: configs/T1042D4RDB_SPIFLASH_defconfig > F: configs/T1042RDB_PI_defconfig > F: configs/T1042RDB_PI_NAND_defconfig > F: configs/T1042RDB_PI_SPIFLASH_defconfig > @@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD > #M: - > S: Maintained > F: configs/T1040RDB_SDCARD_defconfig > +F: configs/T1040D4RDB_SDCARD_defconfig > +F: configs/T1042D4RDB_SDCARD_defconfig > F: configs/T1042RDB_PI_SDCARD_defconfig > > T1040RDB_SECURE_BOOT BOARD > diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c > index e1148e5..217c8ea 100644 > --- a/board/freescale/t104xrdb/ddr.c > +++ b/board/freescale/t104xrdb/ddr.c > @@ -91,9 +91,16 @@ found: > popts->zq_en = 1; > > /* DHC_EN =1, ODT = 75 Ohm */ > +#ifdef CONFIG_SYS_FSL_DDR4 > + popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm); > + popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) | > + DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */ > +#else > popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); > popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); > +#endif > } > +#endif > > #if defined(CONFIG_DEEP_SLEEP) > void board_mem_sleep_setup(void) You added extra #endif. Did you miss something? Please check your local code and make sure it compiles when sending patches. York