[U-Boot] [PATCH] Exynos: Clock: Fix exynos5_get_periph_rate for I2C.

[Guillaume Gardet <guillaume.gardet@free.fr>]

Le 28/02/2015 08:59, Minkyu Kang a ?crit :
> Joonyoung,
>
> On 26/02/15 00:22, Guillaume GARDET wrote:
>> Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup
>> soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec
>> keyboard working again on Samsung Chromebook (snow).
>>
>> Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
>> Cc: Akshay Saraswat <akshay.s@samsung.com>
>> Cc: Minkyu Kang <mk7.kang@samsung.com>
>> Cc: Joonyoung Shim <jy0922.shim@samsung.com>
>>
>> ---
>>   arch/arm/cpu/armv7/exynos/clock.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
>> index c6455c2..7f47d4d 100644
>> --- a/arch/arm/cpu/armv7/exynos/clock.c
>> +++ b/arch/arm/cpu/armv7/exynos/clock.c
>> @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral)
>>   	case PERIPH_ID_I2C6:
>>   	case PERIPH_ID_I2C7:
>>   		src = EXYNOS_SRC_MPLL;
>> -		div = readl(&clk->div_top0);
>> -		sub_div = readl(&clk->div_top1);
>> +		sub_div = readl(&clk->div_top0);
>> +		div = readl(&clk->div_top1);
>>   		break;
>>   	default:
>>   		debug("%s: invalid peripheral %d", __func__, peripheral);
>>
> Could you please check this patch?

Ping.

This patch must be applied before the release, otherwise, keyboard on Samsung Chromebook will no work at all.


Guillaume

>
> Thanks,
> Minkyu Kang.
>