From mboxrd@z Thu Jan  1 00:00:00 1970
From: Peng Fan <Peng.Fan@freescale.com>
Date: Wed, 11 Mar 2015 10:17:00 +0800
Subject: [U-Boot] [PATCH] mmc: fsl_esdhc fix register offset
In-Reply-To: <201503110303.50869.marex@denx.de>
References: <1425972946-9555-1-git-send-email-Peng.Fan@freescale.com>
 <201503101445.40531.marex@denx.de> <54FF933D.7050906@freescale.com>
 <201503110303.50869.marex@denx.de>
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To: u-boot@lists.denx.de

Hi, Marek

On 3/11/2015 10:03 AM, Marek Vasut wrote:
> On Wednesday, March 11, 2015 at 01:58:37 AM, Peng Fan wrote:
>> Hi, Marek
> Hi!
>
>> On 3/10/2015 9:45 PM, Marek Vasut wrote:
>>> On Tuesday, March 10, 2015 at 08:35:46 AM, Peng Fan wrote:
>>>> Commit f022d36e8a4517b2a9d25ff2d75bd2459d0c68b1 introduces
>>>> error register offset.
>>>>
>>>> Change the "char reserved3[59]" to "char reserved3[56]".
>>>>
>>>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>>> This should probably be applied to 2015.04 .
>>>
>>> What are the symptoms of this bug please ?
>> I just found the reserved3 size is wrong, did not do test.
>>   From the driver, only the entry 'scr' of fsl_esdhc below reserved3 is
>> used, so the offset of scr is wrong if using `char reserved3[59]`
> Uh, is the patch tested at all on real hardware ?
Still not test on real hardware. From commit 
f022d36e8a4517b2a9d25ff2d75bd2459d0c68b1,
"
         uint    adsaddr;        /* ADMA system address register */
-       char    reserved2[160]; /* reserved */
+       char    reserved2[100]; /* reserved */
+       uint    vendorspec;     /* Vendor Specific register */
+       char    reserved3[59];  /* reserved */
         uint    hostver;        /* Host controller version register */
"
It's clear that 160 bytes does not equal with (100 + 4 + 59)bytes.
>
> Best regards,
> Marek Vasut
Regards,
Peng.