[PATCH] nvme: Fix cache alignment

[Marek Vasut <marek.vasut@gmail.com>]

On 2/2/21 4:55 AM, Bin Meng wrote:

Hi,

>> The various structures in the driver are already correcty padded and
> 
> typo: correctly
> 
>> cache aligned in memory, however the cache operations are called on
>> the structure sizes, which themselves might not be cache aligned. Add
>> the necessary rounding to fix this, which permits the nvme to work on
>> arm64.
> 
> +ARM guys
> 
> Which ARM64 SoC did you test this with?

RCar3, although that's irrelevant, the problem will happen on any arm or 
arm64, and possibly any other system which needs cache management.

> The round down in this patch should be unnecessary.

Can you explain why ?

> But it's better to
> figure out which call to dcache_xxx() with an unaligned end address.

If you look at the code, most of them can (and do) trigger this, 
therefore they need such alignment, as explained in the commit message.

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